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Wed, 07 Feb 2024 01:02:47 -0800 (PST) Message-ID: Date: Wed, 7 Feb 2024 10:02:45 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 08/13] hw/arm/mps3r: Initial skeleton for mps3-an536 board Content-Language: en-US To: Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org References: <20240206132931.38376-1-peter.maydell@linaro.org> <20240206132931.38376-9-peter.maydell@linaro.org> Cc: =?UTF-8?Q?C=C3=A9dric_Le_Goater?= , Peter Xu , Fabiano Rosas From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: <20240206132931.38376-9-peter.maydell@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::62a; envelope-from=philmd@linaro.org; helo=mail-ej1-x62a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/2/24 14:29, Peter Maydell wrote: > The AN536 is another FPGA image for the MPS3 development board. Unlike > the existing FPGA images we already model, this board uses a Cortex-R > family CPU, and it does not use any equivalent to the M-profile > "Subsystem for Embedded" SoC-equivalent that we model in hw/arm/armsse.c. > It's therefore more convenient for us to model it as a completely > separate C file. > > This commit adds the basic skeleton of the board model, and the > code to create all the RAM and ROM. We assume that we're probably > going to want to add more images in future, so use the same > base class/subclass setup that mps2-tz.c uses, even though at > the moment there's only a single subclass. > > Following commits will add the CPUs and the peripherals. > > Signed-off-by: Peter Maydell > --- > MAINTAINERS | 3 +- > configs/devices/arm-softmmu/default.mak | 1 + > hw/arm/mps3r.c | 239 ++++++++++++++++++++++++ > hw/arm/Kconfig | 5 + > hw/arm/meson.build | 1 + > 5 files changed, 248 insertions(+), 1 deletion(-) > create mode 100644 hw/arm/mps3r.c > +/* > + * The MPS3 DDR is 3GiB, but on a 32-bit host QEMU doesn't permit > + * emulation of that much guest RAM, so artificially make it smaller. > + */ > +#if HOST_LONG_BITS == 32 > +#define MPS3_DDR_SIZE (1 * GiB) > +#else > +#define MPS3_DDR_SIZE (3 * GiB) > +#endif Generically, can we migrate a VM started on a 32-bit host to a 64-bit one? > +static void mps3r_set_default_ram_info(MPS3RMachineClass *mmc) > +{ > + /* > + * Set mc->default_ram_size and default_ram_id from the > + * information in mmc->raminfo. > + */ > + MachineClass *mc = MACHINE_CLASS(mmc); > + const RAMInfo *p; > + > + for (p = mmc->raminfo; p->name; p++) { > + if (p->mrindex < 0) { > + /* Found the entry for "system memory" */ > + mc->default_ram_size = p->size; > + mc->default_ram_id = p->name; Nice. > + return; > + } > + } > + g_assert_not_reached(); > +} Reviewed-by: Philippe Mathieu-Daudé