From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1FphSU-0004NH-2G for qemu-devel@nongnu.org; Mon, 12 Jun 2006 04:07:38 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1FphSS-0004L9-6L for qemu-devel@nongnu.org; Mon, 12 Jun 2006 04:07:37 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1FphSS-0004Ky-2R for qemu-devel@nongnu.org; Mon, 12 Jun 2006 04:07:36 -0400 Received: from [66.249.92.173] (helo=ug-out-1314.google.com) by monty-python.gnu.org with esmtp (Exim 4.52) id 1Fphb7-000689-QL for qemu-devel@nongnu.org; Mon, 12 Jun 2006 04:16:34 -0400 Received: by ug-out-1314.google.com with SMTP id j40so2149634ugd for ; Mon, 12 Jun 2006 01:07:29 -0700 (PDT) Message-ID: Date: Mon, 12 Jun 2006 10:07:28 +0200 From: "Alessandro Corradi" MIME-Version: 1.0 Content-Type: multipart/alternative; boundary="----=_Part_3873_2488815.1150099648911" Subject: [Qemu-devel] Creating a simple Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel ------=_Part_3873_2488815.1150099648911 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi all, I'm trying to write a simple virtual hardware for QEMU. This hw must only return the value 0 every time I read at 0x6f8 address. It looks like simple but I'm not sure... this is what I do... I wrote a file in hw dir called hwfitt.c and implements hwfitt_ioport_read and *hwfitt_init functions. In hwfitt_ioport_read must be a function that implements the hardware read control right? I take for instance parallel.c code and I write hwfitt function call in files where parallel's function are called (pc.c vl.c vl.h) and modified make file. I didn't implement hwupdate_update_irq as in parallel code. Is an error? This is my hwfitt.c code. Can you support me? Thanks Alessandro #include "vl.h" #define HW_STS_READY 0x10 #define HW_STS_BUSY 0x80 #define HW_CTR_INIT 0x01 struct HwFittState { uint8_t data; uint8_t status; uint8_t control; int irq; int irq_pending; CharDriverState *chr; int hw_driver; }; /*static void hwupdate_update_irq(ParallelState *s) { if (s->irq_pending) pic_set_irq(s->irq, 1); else pic_set_irq(s->irq, 0); }*/ static uint32_t hwfitt_ioport_read(void *opaque, uint32_t addr) { HwFittState *s = opaque; uint32_t ret= 0xff; addr &= 7; switch(addr) { case 0: if(s->hw_driver) { s->data=0; } ret = s->data; break; case 1: if(s->hw_driver) { ret=s->status; } break; case 2: if(s->hw_driver) { s->control=0x10; } ret = s->control; break; } #ifdef DEBUG_PARALLEL printf("hwfitt: read addr=0x%02x val=0x%02x\n", addr, ret); #endif return ret; } HwFittState *hwfitt_init(int base, int irq, CharDriverState *chr){ HwFittState *s; s=qemu_mallocz(sizeof(HwFittState)); s->chr = chr; s->hw_driver = 1; s->irq = irq; s->data = 1; s->status = HW_STS_READY; s->status |= HW_STS_BUSY; s->control = HW_CTR_INIT; register_ioport_read(base, 8, 1, hwfitt_ioport_read, s); return s; } ------=_Part_3873_2488815.1150099648911 Content-Type: text/html; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline Hi all,

I'm trying to write a simple virtual hardware for QEMU. This hw must only return the value 0 every time I read at 0x6f8 address.
It looks like simple but I'm not sure... this is what I do...
I wrote a file in hw dir called hwfitt.c and implements hwfitt_ioport_read and *hwfitt_init functions.
In hwfitt_ioport_read must be a function that implements the hardware read control right?
I take for instance parallel.c code and I write hwfitt function call in files where parallel's function are called (pc.c vl.c  vl.h) and modified make file. I didn't implement hwupdate_update_irq as in parallel code. Is an error?
This is my hwfitt.c code. Can you support me?

Thanks

Alessandro

#include "vl.h"

#define HW_STS_READY    0x10
#define HW_STS_BUSY    0x80

#define HW_CTR_INIT    0x01

struct HwFittState {
    uint8_t data;
    uint8_t status;
    uint8_t control;
    int irq;
    int irq_pending;
    CharDriverState *chr;
    int hw_driver;
};

/*static void hwupdate_update_irq(ParallelState *s)
{
    if (s->irq_pending)
        pic_set_irq(s->irq, 1);
    else
        pic_set_irq(s->irq, 0);
}*/

static uint32_t hwfitt_ioport_read(void *opaque, uint32_t addr) {
    HwFittState *s = opaque;
    uint32_t ret= 0xff;
   
    addr &= 7;
    switch(addr) {
    case 0:
        if(s->hw_driver) {
            s->data=0;
        }
        ret = s->data;
        break;
    case 1:
        if(s->hw_driver) {
            ret=s->status;
        }
        break;
    case 2:
        if(s->hw_driver) {
            s->control=0x10;
        }
        ret = s->control;
        break;
    }
#ifdef DEBUG_PARALLEL
    printf("hwfitt: read addr=0x%02x val=0x%02x\n", addr, ret);
#endif
    return ret;
}

HwFittState *hwfitt_init(int base, int irq, CharDriverState *chr){
    HwFittState *s;
   
    s=qemu_mallocz(sizeof(HwFittState));
    s->chr = chr;
    s->hw_driver = 1;
    s->irq = irq;
    s->data = 1;
    s->status = HW_STS_READY;
    s->status |= HW_STS_BUSY;
    s->control = HW_CTR_INIT;
   
    register_ioport_read(base, 8, 1, hwfitt_ioport_read, s);
    return s;
}
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