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[83.59.163.107]) by smtp.gmail.com with ESMTPSA id dm6sm1048994ejc.32.2021.02.03.06.48.13 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 03 Feb 2021 06:48:14 -0800 (PST) Subject: Re: [PATCH v15 15/23] cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass To: Claudio Fontana , =?UTF-8?Q?Alex_Benn=c3=a9e?= References: <20210201100903.17309-1-cfontana@suse.de> <20210201100903.17309-16-cfontana@suse.de> <87im79s05m.fsf@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=c3=a9?= Message-ID: Date: Wed, 3 Feb 2021 15:48:12 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.6.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Language: en-US Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::52d; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ed1-x52d.google.com X-Spam_score_int: -16 X-Spam_score: -1.7 X-Spam_bar: - X-Spam_report: (-1.7 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, NICE_REPLY_A=-0.178, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , Peter Maydell , Thomas Huth , Eduardo Habkost , Richard Henderson , qemu-devel@nongnu.org, Roman Bolshakov , Alistair Francis , Paolo Bonzini Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 2/3/21 3:41 PM, Claudio Fontana wrote: > On 2/3/21 2:23 PM, Alex Bennée wrote: >> Claudio Fontana writes: ... >> /* >> modified target/arm/cpu.c >> @@ -2248,7 +2248,7 @@ static gchar *arm_gdb_arch_name(CPUState *cs) >> * NB: cannot be const, as some elements are changed for specific >> * arm cpu classes. >> */ >> -static struct TCGCPUOps arm_tcg_ops = { >> +static const struct TCGCPUOps arm_tcg_ops = { >> .initialize = arm_translate_init, >> .synchronize_from_tb = arm_cpu_synchronize_from_tb, >> .cpu_exec_interrupt = arm_cpu_exec_interrupt, >> --8<---------------cut here---------------end--------------->8--- >> >> This does later break MIPS jazz: >> >> p/hw_mips_jazz.c.o -c ../../hw/mips/jazz.c >> ../../hw/mips/jazz.c: In function ‘mips_jazz_init’: >> ../../hw/mips/jazz.c:216:40: error: assignment of member ‘do_transaction_failed’ in read-only object >> cc->tcg_ops->do_transaction_failed = mips_jazz_do_transaction_failed; >> >> which... >> >> >>> >>> +#ifdef CONFIG_TCG >>> +#include "hw/core/tcg-cpu-ops.h" >>> +/* >>> + * NB: cannot be const, as some elements are changed for specific >>> + * mips hardware (see hw/mips/jazz.c). >>> + */ >> >> does have a valid comment. So guess keep it as static and just don't >> claim ARM hacks around with it or find a more elegant solution for the >> Jazz hack (I'm not sure there is one). > > Yep, the ARM claim was true when I started looking at this, but now it's not anymore after the changes. > > However, I haven't found a way to remove the mips jazz hack. > > Maybe Philippe knows? We need to test the real behavior on real hardware. Eventually writing the test and asking on linux-mips@vger.kernel.org if someone can run it?