Re: [Qemu-devel] [PATCH v3 2/8] target/mips: Add all MXU opcodes

["Janeczek, Craig" <jancraig@amazon.com>]

I see that I can check the loongson instructions by checking for INSN_LOONGSON2F. Using MXU if that is not set

What should I check for the mult or misc instructions that were there first?

-----Original Message-----
From: Aleksandar Markovic <amarkovic@wavecomp.com> 
Sent: Tuesday, August 28, 2018 11:07 AM
To: Janeczek, Craig <jancraig@amazon.com>; qemu-devel@nongnu.org
Cc: aurelien@aurel32.net
Subject: Re: [PATCH v3 2/8] target/mips: Add all MXU opcodes

> From: Craig Janeczek <jancraig@amazon.com>
> Sent: Tuesday, August 28, 2018 3:00 PM
> To: qemu-devel@nongnu.org
> Cc: Aleksandar Markovic; aurelien@aurel32.net; Craig Janeczek
> Subject: [PATCH v3 2/8] target/mips: Add all MXU opcodes
> 
> Adds all MXU opcodes to the opcode enum. The MXU opcodes overlap with 
> existing misc and Loongson 2F copcodes. The enums were updated to 
> reflect the multiple possible meanings where applicable.
> 
> Signed-off-by: Craig Janeczek <jancraig@amazon.com>

It is good that all codes are covered, but this situation with overlap is unnatural.

Try creating a separate enum for MXU opcodes, and rearranging switch statement, taking into account what instructions set is supported by the CPU in question.