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From: Richard Henderson <richard.henderson@linaro.org>
To: "Helge Deller" <deller@gmx.de>,
	qemu-devel@nongnu.org, "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Subject: Re: [PATCH] target/hppa: Optimize ldcw/ldcd instruction translation
Date: Wed, 13 Sep 2023 09:55:55 -0700	[thread overview]
Message-ID: <ba047867-db8b-8bb6-d2e7-563516c5afb6@linaro.org> (raw)
In-Reply-To: <ZQHLcL6E5uNvjkaN@p100>

On 9/13/23 07:47, Helge Deller wrote:
> +        haddr = (uint32_t *)((uintptr_t)vaddr);
> +        old = *haddr;

This is horribly incorrect, both for user-only and system mode.

> +        /* if already zero, do not write 0 again to reduce memory presssure */
> +        if (old == 0) {
> +            return 0;
> +        }
> +        old = qatomic_xchg(haddr, (uint32_t) 0);

You're also dropping the required host memory barrier.

Frankly, the current tcg_gen_atomic_xchg_reg is as optimized as you'll be able to do.  I 
really doubt the "avoid write 0" is measurable at all.


r~


  reply	other threads:[~2023-09-13 16:56 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-09-13 14:47 [PATCH] target/hppa: Optimize ldcw/ldcd instruction translation Helge Deller
2023-09-13 16:55 ` Richard Henderson [this message]
2023-09-13 17:19   ` Helge Deller
2023-09-13 20:30     ` Richard Henderson
2023-09-14 21:19       ` Helge Deller

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