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Wed, 17 Jan 2024 06:00:19 -0800 (PST) Message-ID: Date: Wed, 17 Jan 2024 15:00:18 +0100 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: chacha20-s390 broken in 8.2.0 in TCG on s390x Content-Language: en-US To: Michael Tokarev , Richard Henderson , QEMU Developers Cc: qemu-s390x , David Hildenbrand References: <764215cd-6f62-4746-b1f5-6174a158f95d@linaro.org> <5c3098cc-3a2f-4272-b06a-6d12d645d628@linaro.org> From: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2a00:1450:4864:20::32f; envelope-from=philmd@linaro.org; helo=mail-wm1-x32f.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 17/1/24 12:53, Michael Tokarev wrote: > 04.01.2024 01:51, Richard Henderson : >> On 1/4/24 01:37, Philippe Mathieu-Daudé wrote: >>> Finally changing the constraints on op_rotli_vec seems to fix it: >>> >>> --- >>> diff --git a/tcg/s390x/tcg-target.c.inc b/tcg/s390x/tcg-target.c.inc >>> index fbee43d3b0..b3456fe857 100644 >>> --- a/tcg/s390x/tcg-target.c.inc >>> +++ b/tcg/s390x/tcg-target.c.inc >>> @@ -3264,13 +3264,13 @@ static TCGConstraintSetIndex >>> tcg_target_op_def(TCGOpcode op) >>>       case INDEX_op_ld_vec: >>>       case INDEX_op_dupm_vec: >>> +    case INDEX_op_rotli_vec: >>>           return C_O1_I1(v, r); >>>       case INDEX_op_dup_vec: >>>           return C_O1_I1(v, vr); >>>       case INDEX_op_abs_vec: >>>       case INDEX_op_neg_vec: >>>       case INDEX_op_not_vec: >>> -    case INDEX_op_rotli_vec: >>>       case INDEX_op_sari_vec: >>>       case INDEX_op_shli_vec: >>>       case INDEX_op_shri_vec: >>>       case INDEX_op_s390_vuph_vec: >>>       case INDEX_op_s390_vupl_vec: >>>           return C_O1_I1(v, v); >> >> Definitely not correct, since VERLL requires a vector input to be >> rotated. >> >>> But I'm outside of my comfort zone so not really sure what I'm doing... >>> (I was inspired by the "the instruction verll only allows immediates up >>> to 32 bits." comment from >>> https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg317099.html) >> >> That message is confused.  The immediate in VERLL is 12 bits (with >> only 6 bits ever used for MO_64).  Dunno where "32 bits" comes from. > > So, what do we have here in the end? > Should we fix this on qemu side? Yes. > This thread stopped quite some time ago, with problematic > instruction found but no solution.. Be assured we are spending (too?) many hours on this...