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Tue, 4 Jul 2023 10:11:57 +0000 (GMT) Message-ID: Date: Tue, 4 Jul 2023 12:11:56 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.12.0 Subject: Re: [PATCH v2 3/5] ppc/pnv: Add P10 quad xscom model Content-Language: en-US To: Joel Stanley , =?UTF-8?Q?C=c3=a9dric_Le_Goater?= , Nicholas Piggin Cc: qemu-devel@nongnu.org, qemu-ppc@nongnu.org References: <20230704054204.168547-1-joel@jms.id.au> <20230704054204.168547-4-joel@jms.id.au> From: Frederic Barrat In-Reply-To: <20230704054204.168547-4-joel@jms.id.au> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-TM-AS-GCONF: 00 X-Proofpoint-GUID: eKtfvL4cQukwbQUl52jbFKS4bkd4tRPF X-Proofpoint-ORIG-GUID: u-d3sM3YkqiFn6hNGvqZFMR_dDVsz3f8 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.254,Aquarius:18.0.957,Hydra:6.0.591,FMLib:17.11.176.26 definitions=2023-07-04_06,2023-06-30_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 clxscore=1015 suspectscore=0 bulkscore=0 spamscore=0 mlxscore=0 impostorscore=0 phishscore=0 mlxlogscore=999 malwarescore=0 adultscore=0 priorityscore=1501 lowpriorityscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2305260000 definitions=main-2307040083 Received-SPF: pass client-ip=148.163.156.1; envelope-from=fbarrat@linux.ibm.com; helo=mx0a-001b2d01.pphosted.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.09, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 04/07/2023 07:42, Joel Stanley wrote: > Add a PnvQuad class for the P10 powernv machine. No xscoms are > implemented yet, but this allows them to be added. > > The size is reduced to avoid the quad region from overlapping with the > core region. > > address-space: xscom-0 > 0000000000000000-00000003ffffffff (prio 0, i/o): xscom-0 > 0000000100000000-00000001000fffff (prio 0, i/o): xscom-quad.0 > 0000000100108000-0000000100907fff (prio 0, i/o): xscom-core.3 > 0000000100110000-000000010090ffff (prio 0, i/o): xscom-core.2 > 0000000100120000-000000010091ffff (prio 0, i/o): xscom-core.1 > 0000000100140000-000000010093ffff (prio 0, i/o): xscom-core.0 > > Signed-off-by: Joel Stanley > --- Reviewed-by: Frederic Barrat Fred > v2: Fix unimp read message > Wrap lines at 80 col > Set size > --- > include/hw/ppc/pnv_xscom.h | 2 +- > hw/ppc/pnv.c | 2 +- > hw/ppc/pnv_core.c | 54 ++++++++++++++++++++++++++++++++++++++ > 3 files changed, 56 insertions(+), 2 deletions(-) > > diff --git a/include/hw/ppc/pnv_xscom.h b/include/hw/ppc/pnv_xscom.h > index cbe848d27ba0..f7da9a1dc617 100644 > --- a/include/hw/ppc/pnv_xscom.h > +++ b/include/hw/ppc/pnv_xscom.h > @@ -129,7 +129,7 @@ struct PnvXScomInterfaceClass { > > #define PNV10_XSCOM_EQ_BASE(core) \ > ((uint64_t) PNV10_XSCOM_EQ(PNV10_XSCOM_EQ_CHIPLET(core))) > -#define PNV10_XSCOM_EQ_SIZE 0x100000 > +#define PNV10_XSCOM_EQ_SIZE 0x20000 > > #define PNV10_XSCOM_EC_BASE(core) \ > ((uint64_t) PNV10_XSCOM_EQ_BASE(core) | PNV10_XSCOM_EC(core & 0x3)) > diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c > index c77fdb6747a4..5f25fe985ab2 100644 > --- a/hw/ppc/pnv.c > +++ b/hw/ppc/pnv.c > @@ -1669,7 +1669,7 @@ static void pnv_chip_power10_quad_realize(Pnv10Chip *chip10, Error **errp) > PnvQuad *eq = &chip10->quads[i]; > > pnv_chip_quad_realize_one(chip, eq, chip->cores[i * 4], > - PNV_QUAD_TYPE_NAME("power9")); > + PNV_QUAD_TYPE_NAME("power10")); > > pnv_xscom_add_subregion(chip, PNV10_XSCOM_EQ_BASE(eq->quad_id), > &eq->xscom_regs); > diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c > index 73d25409c937..e4df435b15e9 100644 > --- a/hw/ppc/pnv_core.c > +++ b/hw/ppc/pnv_core.c > @@ -404,6 +404,47 @@ static const MemoryRegionOps pnv_quad_power9_xscom_ops = { > .endianness = DEVICE_BIG_ENDIAN, > }; > > +/* > + * POWER10 Quads > + */ > + > +static uint64_t pnv_quad_power10_xscom_read(void *opaque, hwaddr addr, > + unsigned int width) > +{ > + uint32_t offset = addr >> 3; > + uint64_t val = -1; > + > + switch (offset) { > + default: > + qemu_log_mask(LOG_UNIMP, "%s: reading @0x%08x\n", __func__, > + offset); > + } > + > + return val; > +} > + > +static void pnv_quad_power10_xscom_write(void *opaque, hwaddr addr, > + uint64_t val, unsigned int width) > +{ > + uint32_t offset = addr >> 3; > + > + switch (offset) { > + default: > + qemu_log_mask(LOG_UNIMP, "%s: writing @0x%08x\n", __func__, > + offset); > + } > +} > + > +static const MemoryRegionOps pnv_quad_power10_xscom_ops = { > + .read = pnv_quad_power10_xscom_read, > + .write = pnv_quad_power10_xscom_write, > + .valid.min_access_size = 8, > + .valid.max_access_size = 8, > + .impl.min_access_size = 8, > + .impl.max_access_size = 8, > + .endianness = DEVICE_BIG_ENDIAN, > +}; > + > static void pnv_quad_realize(DeviceState *dev, Error **errp) > { > PnvQuad *eq = PNV_QUAD(dev); > @@ -430,6 +471,14 @@ static void pnv_quad_power9_class_init(ObjectClass *oc, void *data) > pqc->xscom_size = PNV9_XSCOM_EQ_SIZE; > } > > +static void pnv_quad_power10_class_init(ObjectClass *oc, void *data) > +{ > + PnvQuadClass *pqc = PNV_QUAD_CLASS(oc); > + > + pqc->xscom_ops = &pnv_quad_power10_xscom_ops; > + pqc->xscom_size = PNV10_XSCOM_EQ_SIZE; > +} > + > static void pnv_quad_class_init(ObjectClass *oc, void *data) > { > DeviceClass *dc = DEVICE_CLASS(oc); > @@ -453,6 +502,11 @@ static const TypeInfo pnv_quad_infos[] = { > .name = PNV_QUAD_TYPE_NAME("power9"), > .class_init = pnv_quad_power9_class_init, > }, > + { > + .parent = TYPE_PNV_QUAD, > + .name = PNV_QUAD_TYPE_NAME("power10"), > + .class_init = pnv_quad_power10_class_init, > + }, > }; > > DEFINE_TYPES(pnv_quad_infos);