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From: David Hildenbrand <david@redhat.com>
To: Ethan Chen <ethan84@andestech.com>, qemu-devel@nongnu.org
Cc: "Paolo Bonzini" <pbonzini@redhat.com>,
	"Peter Xu" <peterx@redhat.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH 1/6] exec/memory: Introduce the translate_size function within the IOMMU class
Date: Wed, 25 Oct 2023 16:56:22 +0200	[thread overview]
Message-ID: <babd9eb7-1f9c-478a-b288-96606795fc8b@redhat.com> (raw)
In-Reply-To: <20231025051430.493079-2-ethan84@andestech.com>

On 25.10.23 07:14, Ethan Chen wrote:
> IOMMU have size information during translation.
> 

Can you add some more information why we would want this and how the 
backend can do "better" things with the size at hand?

Note that I was not CCed on the cover letter.

> Signed-off-by: Ethan Chen <ethan84@andestech.com>
> ---
>   include/exec/memory.h | 19 +++++++++++++++++++
>   1 file changed, 19 insertions(+)
> 
> diff --git a/include/exec/memory.h b/include/exec/memory.h
> index 9087d02769..5520b7c8c0 100644
> --- a/include/exec/memory.h
> +++ b/include/exec/memory.h
> @@ -396,6 +396,25 @@ struct IOMMUMemoryRegionClass {
>        */
>       IOMMUTLBEntry (*translate)(IOMMUMemoryRegion *iommu, hwaddr addr,
>                                  IOMMUAccessFlags flag, int iommu_idx);
> +    /**
> +     * @translate_size:
> +     *
> +     * Return a TLB entry that contains a given address and size.
> +     *
> +     * @iommu: the IOMMUMemoryRegion
> +     *
> +     * @hwaddr: address to be translated within the memory region
> +     *
> +     * @size: size to indicate the scope of the entire transaction
> +     *
> +     * @flag: requested access permission
> +     *
> +     * @iommu_idx: IOMMU index for the translation
> +     */
> +    IOMMUTLBEntry (*translate_size)(IOMMUMemoryRegion *iommu, hwaddr addr,
> +                                    hwaddr size, IOMMUAccessFlags flag,
> +                                    int iommu_idx);
> +
>       /**
>        * @get_min_page_size:
>        *

-- 
Cheers,

David / dhildenb



  parent reply	other threads:[~2023-10-25 14:56 UTC|newest]

Thread overview: 33+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-10-25  5:14 [PATCH 0/6] Support RISC-V IOPMP Ethan Chen via
2023-10-25  5:14 ` Ethan Chen
2023-10-25  5:14 ` [PATCH 1/6] exec/memory: Introduce the translate_size function within the IOMMU class Ethan Chen via
2023-10-25  5:14   ` Ethan Chen
2023-10-25 14:56   ` David Hildenbrand [this message]
2023-10-26  7:14     ` Ethan Chen via
2023-10-26  7:14       ` Ethan Chen
2023-10-26  7:26       ` David Hildenbrand
2023-10-25  5:14 ` [PATCH 2/6] system/physmem: IOMMU: Invoke the translate_size function if it is implemented Ethan Chen via
2023-10-25  5:14   ` Ethan Chen
2023-10-25 15:14   ` Peter Xu
2023-10-26  6:48     ` Ethan Chen via
2023-10-26  6:48       ` Ethan Chen
2023-10-26 14:20       ` Peter Xu
2023-10-27  3:28     ` Ethan Chen via
2023-10-27  3:28       ` Ethan Chen
2023-10-27 16:02       ` Peter Xu
2023-10-27 16:13         ` Peter Xu
2023-10-30  6:00         ` Ethan Chen via
2023-10-30  6:00           ` Ethan Chen
2023-10-30 15:02           ` Peter Xu
2023-10-31  8:52             ` Ethan Chen via
2023-10-31  8:52               ` Ethan Chen
2023-10-25  5:14 ` [PATCH 3/6] exec/memattrs: Add iopmp source id to MemTxAttrs Ethan Chen via
2023-10-25  5:14   ` Ethan Chen
2023-10-25  5:14 ` [PATCH 4/6] Add RISC-V IOPMP support Ethan Chen via
2023-10-25  5:14   ` Ethan Chen
2023-10-25  5:14 ` [PATCH 5/6] hw/dma: Add Andes ATCDMAC300 support Ethan Chen via
2023-10-25  5:14   ` Ethan Chen
2023-10-25  5:14 ` [PATCH 6/6] hw/riscv/virt: Add IOPMP support Ethan Chen via
2023-10-25  5:14   ` Ethan Chen
2023-10-26 12:02 ` [PATCH 0/6] Support RISC-V IOPMP Ethan Chen via
2023-10-26 12:02   ` Ethan Chen

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