From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>,
qemu-arm@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH 04/10] target/arm: Make the t32 insn[25:23]=111 group non-overlapping
Date: Tue, 13 Oct 2020 09:40:19 -0700 [thread overview]
Message-ID: <bad2de7a-68db-ad0a-0976-ebf475992e17@linaro.org> (raw)
In-Reply-To: <20201012153746.9996-5-peter.maydell@linaro.org>
On 10/12/20 8:37 AM, Peter Maydell wrote:
> The t32 decode has a group which represents a set of insns
> which overlap with B_cond_thumb because they have [25:23]=111
> (which is an invalid condition code field for the branch insn).
> This group is currently defined using the {} overlap-OK syntax,
> but it is almost entirely non-overlapping patterns. Switch
> it over to use a non-overlapping group.
>
> For this to be valid syntactically, CPS must move into the same
> overlapping-group as the hint insns (CPS vs hints was the
> only actual use of the overlap facility for the group).
>
> The non-overlapping subgroup for CLREX/DSB/DMB/ISB/SB is no longer
> necessary and so we can remove it (promoting those insns to
> be members of the parent group).
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> Just a minor bit of tidying that I did while I was trying to
> work out whether the v8.1M loop/branch insns needed to go in
> this group. (As it turns out, they don't.)
> ---
> target/arm/t32.decode | 26 ++++++++++++--------------
> 1 file changed, 12 insertions(+), 14 deletions(-)
Nice cleanup, thanks.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2020-10-13 16:41 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-10-12 15:37 [PATCH 00/10] target/arm: Various v8.1M minor features Peter Maydell
2020-10-12 15:37 ` [PATCH 01/10] decodetree: Fix codegen for non-overlapping group inside overlapping group Peter Maydell
2020-10-13 16:02 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 02/10] target/arm: Implement v8.1M NOCP handling Peter Maydell
2020-10-12 15:37 ` [PATCH 03/10] target/arm: Implement v8.1M conditional-select insns Peter Maydell
2020-10-13 16:37 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 04/10] target/arm: Make the t32 insn[25:23]=111 group non-overlapping Peter Maydell
2020-10-13 16:40 ` Richard Henderson [this message]
2020-10-12 15:37 ` [PATCH 05/10] target/arm: Don't allow BLX imm for M-profile Peter Maydell
2020-10-13 16:41 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 06/10] target/arm: Implement v8.1M branch-future insns (as NOPs) Peter Maydell
2020-10-13 16:58 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 07/10] target/arm: Implement v8.1M low-overhead-loop instructions Peter Maydell
2020-10-12 19:56 ` Peter Maydell
2020-10-13 17:10 ` Richard Henderson
2020-10-13 17:12 ` Peter Maydell
2020-10-13 17:30 ` Richard Henderson
2020-10-13 20:24 ` Peter Maydell
2020-10-13 22:31 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 08/10] target/arm: Fix has_vfp/has_neon ID reg squashing for M-profile Peter Maydell
2020-10-13 19:07 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 09/10] target/arm: Implement FPSCR.LTPSIZE for M-profile LOB extension Peter Maydell
2020-10-13 20:06 ` Richard Henderson
2020-10-13 20:38 ` Peter Maydell
2020-10-13 21:01 ` Richard Henderson
2020-10-12 15:37 ` [PATCH 10/10] target/arm: Fix writing to FPSCR.FZ16 on M-profile Peter Maydell
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