From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41226) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZGOco-0007oF-T2 for qemu-devel@nongnu.org; Sat, 18 Jul 2015 05:41:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ZGOcn-0004h9-3w for qemu-devel@nongnu.org; Sat, 18 Jul 2015 05:41:42 -0400 Received: from mail-pd0-x233.google.com ([2607:f8b0:400e:c02::233]:34319) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ZGOcm-0004gt-PJ for qemu-devel@nongnu.org; Sat, 18 Jul 2015 05:41:41 -0400 Received: by pdbbh15 with SMTP id bh15so28704777pdb.1 for ; Sat, 18 Jul 2015 02:41:40 -0700 (PDT) From: Peter Crosthwaite Date: Sat, 18 Jul 2015 02:40:29 -0700 Message-Id: In-Reply-To: References: In-Reply-To: References: Subject: [Qemu-devel] [PATCH v3 19/35] target-*: cpu.h: Undefine core code symbols List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: peter.maydell@linaro.org, Peter Crosthwaite , edgar.iglesias@gmail.com, pbonzini@redhat.com, afaerber@suse.de, rth@twiddle.net Pre-undefine all symbols that cpu.h defines for the sake of core code. This is to allow inclusion of multiple cpu.h's from system level code implementing multi-arch machines. Signed-off-by: Peter Crosthwaite --- Such system level code cannot validly use these symbols as they are ambiguous. So we should probably add some sort of poisoning system as follow up work. --- include/exec/cpu-defs-clear.h | 33 +++++++++++++++++++++++++++++++++ target-alpha/cpu.h | 1 + target-arm/cpu.h | 1 + target-cris/cpu.h | 1 + target-i386/cpu.h | 1 + target-lm32/cpu.h | 2 ++ target-m68k/cpu.h | 2 ++ target-microblaze/cpu.h | 1 + target-mips/cpu.h | 2 ++ target-moxie/cpu.h | 1 + target-openrisc/cpu.h | 2 ++ target-ppc/cpu.h | 1 + target-s390x/cpu.h | 1 + target-sh4/cpu.h | 1 + target-sparc/cpu.h | 1 + target-tricore/cpu.h | 1 + target-unicore32/cpu.h | 2 ++ target-xtensa/cpu.h | 2 ++ 18 files changed, 56 insertions(+) create mode 100644 include/exec/cpu-defs-clear.h diff --git a/include/exec/cpu-defs-clear.h b/include/exec/cpu-defs-clear.h new file mode 100644 index 0000000..f801612 --- /dev/null +++ b/include/exec/cpu-defs-clear.h @@ -0,0 +1,33 @@ +/* + * Undefine the standard macros defined by cpu.h which are used by core code. + * Each arch cpu.h should include this before defining any of these symbols. + * This is to allow system level code to include multiple arches cpu.h. + * + * Copyright (c) 2015 Peter Crosthwaite + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License as published by the Free Software Foundation; either + * version 2 of the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +/* No multiple include guard intended. */ + +#undef CPUArchState + +#undef ELF_MACHINE + +#undef TARGET_LONG_BITS +#undef TARGET_PAGE_BITS +#undef TARGET_PHYS_ADDR_SPACE_BITS +#undef TARGET_VIRT_ADDR_SPACE_BITS + +#undef NB_MMU_MODES diff --git a/target-alpha/cpu.h b/target-alpha/cpu.h index fbdabb2..5a2fd75 100644 --- a/target-alpha/cpu.h +++ b/target-alpha/cpu.h @@ -22,6 +22,7 @@ #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" #define TARGET_LONG_BITS 64 #define ALIGNED_ONLY diff --git a/target-arm/cpu.h b/target-arm/cpu.h index 7282833..b93db7c 100644 --- a/target-arm/cpu.h +++ b/target-arm/cpu.h @@ -20,6 +20,7 @@ #define CPU_ARM_H #include "config.h" +#include "exec/cpu-defs-clear.h" #include "kvm-consts.h" diff --git a/target-cris/cpu.h b/target-cris/cpu.h index cf8ea10..91b6791 100644 --- a/target-cris/cpu.h +++ b/target-cris/cpu.h @@ -22,6 +22,7 @@ #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" #define TARGET_LONG_BITS 32 diff --git a/target-i386/cpu.h b/target-i386/cpu.h index ff01152..98d7a5a 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -21,6 +21,7 @@ #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" #ifdef TARGET_X86_64 #define TARGET_LONG_BITS 64 diff --git a/target-lm32/cpu.h b/target-lm32/cpu.h index 80a42e9..0ab4624 100644 --- a/target-lm32/cpu.h +++ b/target-lm32/cpu.h @@ -20,6 +20,8 @@ #ifndef CPU_LM32_H #define CPU_LM32_H +#include "exec/cpu-defs-clear.h" + #define TARGET_LONG_BITS 32 #define CPUArchState struct CPULM32State diff --git a/target-m68k/cpu.h b/target-m68k/cpu.h index 5865235..344a70c 100644 --- a/target-m68k/cpu.h +++ b/target-m68k/cpu.h @@ -20,6 +20,8 @@ #ifndef CPU_M68K_H #define CPU_M68K_H +#include "exec/cpu-defs-clear.h" + #define TARGET_LONG_BITS 32 #define CPUArchState struct CPUM68KState diff --git a/target-microblaze/cpu.h b/target-microblaze/cpu.h index 86dd1ce..d4089ff 100644 --- a/target-microblaze/cpu.h +++ b/target-microblaze/cpu.h @@ -21,6 +21,7 @@ #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" #define TARGET_LONG_BITS 32 diff --git a/target-mips/cpu.h b/target-mips/cpu.h index 54273c6..f1dfb9f 100644 --- a/target-mips/cpu.h +++ b/target-mips/cpu.h @@ -5,6 +5,8 @@ #define ALIGNED_ONLY +#include "exec/cpu-defs-clear.h" + #define ELF_MACHINE EM_MIPS #define CPUArchState struct CPUMIPSState diff --git a/target-moxie/cpu.h b/target-moxie/cpu.h index 5be9d02..d092ffe 100644 --- a/target-moxie/cpu.h +++ b/target-moxie/cpu.h @@ -21,6 +21,7 @@ #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" #define TARGET_LONG_BITS 32 diff --git a/target-openrisc/cpu.h b/target-openrisc/cpu.h index 9e8db1f..3a39e50 100644 --- a/target-openrisc/cpu.h +++ b/target-openrisc/cpu.h @@ -20,6 +20,8 @@ #ifndef CPU_OPENRISC_H #define CPU_OPENRISC_H +#include "exec/cpu-defs-clear.h" + #define TARGET_LONG_BITS 32 #define ELF_MACHINE EM_OPENRISC diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 9b79f13..6ae13ed 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -21,6 +21,7 @@ #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" //#define PPC_EMULATE_32BITS_HYPV diff --git a/target-s390x/cpu.h b/target-s390x/cpu.h index 4ee4d7f..6fa4746 100644 --- a/target-s390x/cpu.h +++ b/target-s390x/cpu.h @@ -24,6 +24,7 @@ #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" #define TARGET_LONG_BITS 64 diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 3cd1b19..87975ea 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -21,6 +21,7 @@ #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" #define TARGET_LONG_BITS 32 diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index cc26587..d3fee15 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -3,6 +3,7 @@ #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" #include "qemu/bswap.h" #define ALIGNED_ONLY diff --git a/target-tricore/cpu.h b/target-tricore/cpu.h index fa49d9d..e26ca27 100644 --- a/target-tricore/cpu.h +++ b/target-tricore/cpu.h @@ -22,6 +22,7 @@ #include "tricore-defs.h" #include "config.h" #include "qemu-common.h" +#include "exec/cpu-defs-clear.h" #include "exec/cpu-defs.h" #include "fpu/softfloat.h" diff --git a/target-unicore32/cpu.h b/target-unicore32/cpu.h index ba885d3..9a4e3c0 100644 --- a/target-unicore32/cpu.h +++ b/target-unicore32/cpu.h @@ -11,6 +11,8 @@ #ifndef QEMU_UNICORE32_CPU_H #define QEMU_UNICORE32_CPU_H +#include "exec/cpu-defs-clear.h" + #define TARGET_LONG_BITS 32 #define TARGET_PAGE_BITS 12 diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index e7c2588..42493ab 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -28,6 +28,8 @@ #ifndef CPU_XTENSA_H #define CPU_XTENSA_H +#include "exec/cpu-defs-clear.h" + #define ALIGNED_ONLY #define TARGET_LONG_BITS 32 #define ELF_MACHINE EM_XTENSA -- 1.9.1