From: Richard Henderson <richard.henderson@linaro.org>
To: Jiajie Chen <c@jia.je>, qemu-devel@nongnu.org
Cc: yijun@loongson.cn, shenjinyang@loongson.cn, gaosong@loongson.cn,
i.qemu@xen0n.name
Subject: Re: [PATCH v4 08/11] target/loongarch: Reject la64-only instructions in la32 mode
Date: Tue, 8 Aug 2023 11:48:27 -0700 [thread overview]
Message-ID: <bb7294c3-1f2b-d6df-06fe-833233beca5d@linaro.org> (raw)
In-Reply-To: <20230808015506.1705140-9-c@jia.je>
On 8/7/23 18:54, Jiajie Chen wrote:
> -TRANS(addi_d, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_addi_tl)
> -TRANS(alsl_w, gen_rrr_sa, EXT_NONE, EXT_SIGN, gen_alsl)
> -TRANS(alsl_wu, gen_rrr_sa, EXT_NONE, EXT_ZERO, gen_alsl)
> -TRANS(alsl_d, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_alsl)
> +TRANS_64(addi_d, gen_rri_c, EXT_NONE, EXT_NONE, tcg_gen_addi_tl)
> +TRANS_64(alsl_w, gen_rrr_sa, EXT_NONE, EXT_SIGN, gen_alsl)
> +TRANS_64(alsl_wu, gen_rrr_sa, EXT_NONE, EXT_ZERO, gen_alsl)
> +TRANS_64(alsl_d, gen_rrr_sa, EXT_NONE, EXT_NONE, gen_alsl)
alsl.w is in LA32, according to the table 2 on page 15.
> +/* for LoongArch64-only instructions */
> +#define TRANS_64(NAME, FUNC, ...) \
> + static bool trans_##NAME(DisasContext *ctx, arg_##NAME * a) \
> + { \
> + if (ctx->la32) { \
> + return false; \
> + } \
> + return FUNC(ctx, a, __VA_ARGS__); \
> + }
With the change suggested for patch 7, this becomes
return ctx->la64 && FUNC(...)
r~
next prev parent reply other threads:[~2023-08-08 18:48 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-08 1:54 [PATCH v4 00/11] Add la32 & va32 mode for loongarch64-softmmu Jiajie Chen
2023-08-08 1:54 ` [PATCH v4 01/11] target/loongarch: Add macro to check current arch Jiajie Chen
2023-08-08 17:01 ` Richard Henderson
2023-08-08 17:13 ` Jiajie Chen
2023-08-10 11:08 ` Philippe Mathieu-Daudé
2023-08-10 11:06 ` Philippe Mathieu-Daudé
2023-08-08 1:54 ` [PATCH v4 02/11] target/loongarch: Add new object class for loongarch32 cpus Jiajie Chen
2023-08-08 18:19 ` Richard Henderson
2023-08-08 1:54 ` [PATCH v4 03/11] target/loongarch: Add GDB support for loongarch32 mode Jiajie Chen
2023-08-08 18:34 ` Richard Henderson
2023-08-08 1:54 ` [PATCH v4 04/11] target/loongarch: Support LoongArch32 TLB entry Jiajie Chen
2023-08-08 18:37 ` Richard Henderson
2023-08-08 1:54 ` [PATCH v4 05/11] target/loongarch: Support LoongArch32 DMW Jiajie Chen
2023-08-08 18:37 ` Richard Henderson
2023-08-08 1:54 ` [PATCH v4 06/11] target/loongarch: Support LoongArch32 VPPN Jiajie Chen
2023-08-08 18:38 ` Richard Henderson
2023-08-08 1:54 ` [PATCH v4 07/11] target/loongarch: Add LA32 & VA32 to DisasContext Jiajie Chen
2023-08-08 18:40 ` Richard Henderson
2023-08-08 1:54 ` [PATCH v4 08/11] target/loongarch: Reject la64-only instructions in la32 mode Jiajie Chen
2023-08-08 18:48 ` Richard Henderson [this message]
2023-08-08 1:54 ` [PATCH v4 09/11] target/loongarch: Truncate high 32 bits of address in VA32 mode Jiajie Chen
2023-08-08 19:08 ` Richard Henderson
2023-08-08 1:54 ` [PATCH v4 10/11] target/loongarch: Sign extend results " Jiajie Chen
2023-08-08 19:12 ` Richard Henderson
2023-08-08 1:54 ` [PATCH v4 11/11] target/loongarch: Add loongarch32 cpu la132 Jiajie Chen
2023-08-08 1:59 ` Jiajie Chen
2023-08-08 19:26 ` Richard Henderson
2023-08-09 7:31 ` Jiajie Chen
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