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Mon, 20 Oct 2025 16:15:20 -0700 (PDT) Received: from [192.168.1.111] ([38.41.223.211]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-b6a813d4766sm6984603a12.5.2025.10.20.16.15.19 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 20 Oct 2025 16:15:20 -0700 (PDT) Message-ID: Date: Mon, 20 Oct 2025 16:15:19 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 19/30] qemu/target-info: Add target_base_arch() Content-Language: en-US To: =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Cc: Anton Johansson , qemu-arm@nongnu.org References: <20251020220941.65269-1-philmd@linaro.org> <20251020221508.67413-4-philmd@linaro.org> From: Pierrick Bouvier In-Reply-To: <20251020221508.67413-4-philmd@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1035; envelope-from=pierrick.bouvier@linaro.org; helo=mail-pj1-x1035.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2025-10-20 15:14, Philippe Mathieu-Daudé wrote: > When multiple QEMU targets are variants (word size, endianness) > of the same base architecture, target_base_arch() returns this > base. For example, for the Aarch64 target it will return > SYS_EMU_TARGET_ARM as common base. > I'm not sure that reusing semantic on a subset of this enum is the best idea, so many things can go wrong. More widely, I don't know where we would need to access this, versus specific functions like target_base_arm(). If a code needs to check various base archs target_base_*, or it can use a switch with all variants. If we really want to have this target_base concept, at least it deserves it's own enum, separate from SYS_EMU_TARGET. > Signed-off-by: Philippe Mathieu-Daudé > --- > include/qemu/target-info-impl.h | 2 ++ > include/qemu/target-info-qapi.h | 7 +++++++ > target-info-stub.c | 1 + > target-info.c | 10 ++++++++++ > 4 files changed, 20 insertions(+) > > diff --git a/include/qemu/target-info-impl.h b/include/qemu/target-info-impl.h > index e446585bf53..2c171f8359b 100644 > --- a/include/qemu/target-info-impl.h > +++ b/include/qemu/target-info-impl.h > @@ -17,6 +17,8 @@ typedef struct TargetInfo { > const char *target_name; > /* related to TARGET_ARCH definition */ > SysEmuTarget target_arch; > + /* related to TARGET_BASE_ARCH definition (target/${base_arch}/ path) */ > + SysEmuTarget target_base_arch; > /* runtime equivalent of TARGET_LONG_BITS definition */ > unsigned long_bits; > /* runtime equivalent of CPU_RESOLVING_TYPE definition */ > diff --git a/include/qemu/target-info-qapi.h b/include/qemu/target-info-qapi.h > index d5ce0523238..65ed4ca8eea 100644 > --- a/include/qemu/target-info-qapi.h > +++ b/include/qemu/target-info-qapi.h > @@ -19,6 +19,13 @@ > */ > SysEmuTarget target_arch(void); > > +/** > + * target_base_arch: > + * > + * Returns: QAPI SysEmuTarget enum (i.e. SYS_EMU_TARGET_I386). > + */ > +SysEmuTarget target_base_arch(void); > + > /** > * target_endian_mode: > * > diff --git a/target-info-stub.c b/target-info-stub.c > index d96d8249c1d..d2cfca1b4c2 100644 > --- a/target-info-stub.c > +++ b/target-info-stub.c > @@ -19,6 +19,7 @@ QEMU_BUILD_BUG_ON(offsetof(ArchCPU, env) != sizeof(CPUState)); > static const TargetInfo target_info_stub = { > .target_name = TARGET_NAME, > .target_arch = SYS_EMU_TARGET__MAX, > + .target_base_arch = SYS_EMU_TARGET__MAX, And nothing can enforce base and arch match by design, which is a problem IMHO. > .long_bits = TARGET_LONG_BITS, > .cpu_type = CPU_RESOLVING_TYPE, > .machine_typename = TYPE_MACHINE, > diff --git a/target-info.c b/target-info.c > index e567cb4c40a..332198e40a2 100644 > --- a/target-info.c > +++ b/target-info.c > @@ -33,6 +33,16 @@ SysEmuTarget target_arch(void) > return arch; > } > > +SysEmuTarget target_base_arch(void) > +{ > + SysEmuTarget base_arch = target_info()->target_base_arch; > + > + if (base_arch == SYS_EMU_TARGET__MAX) { > + base_arch = target_arch(); > + } > + return base_arch; More confusing, we can eventually return a non base arch if base arch was not correctly set above. > +} > + > const char *target_cpu_type(void) > { > return target_info()->cpu_type;