Re: [PATCH] target/i386: Fix physical address truncation when PAE is enabled

[Richard Henderson <richard.henderson@linaro.org>]

On 12/20/23 22:03, Michael Brown wrote:
> For the default case, I think it would make sense to unconditionally truncate the address 
> to 32 bits if paging is disabled.  (I am not sure why the original commit 33dfdb5 included 
> a test for long mode, since I do not see how it is possible to get the CPU into long mode 
> with paging disabled.)

You are correct that paging is mandatory for LMA -- indeed, setting CR0.PG is the final 
step in 10.8.5 Initializing IA-32e Mode, which copies EFER.LME to EFER.LMA.

The commit 33dfdb5 that you reference is definitely wrong.

> I do not know what ought to be done in the MMU_NESTED_IDX case, and would appreciate your 
> input on this.

It would be ideal if MMU_NESTED_IDX were only used when virtualization is enabled and 
nested_ctl & SVM_NPT_ENABLED, i.e. when use_stage2 is true.

I can't remember why I added a check for use_stage2 for MMU_NESTED_IDX in 98281984a37.  It 
is possible that, as that patch introduced the feature, I was being cautious.  It's also 
possible that I did see something, but then it was cleaned up somewhere in the rest of 
that rather large patch series.

In any case, current intended behaviour is that MMU_NESTED_IDX with !use_stage2 equates to 
MMU_PHYS_IDX.


r~