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Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.11.0 Subject: Re: [PATCH 4/9] include/hw: introduce CPU_MAX_NEGATIVE_ENV_OFFSET Content-Language: en-US To: Anton Johansson , qemu-devel@nongnu.org Cc: ale@rev.ng, pbonzini@redhat.com, eduardo@habkost.net, philmd@linaro.org, marcel.apfelbaum@gmail.com, peter.maydell@linaro.org, wangyanan55@huawei.com References: <20230630122551.21766-1-anjo@rev.ng> <20230630122551.21766-5-anjo@rev.ng> From: Richard Henderson In-Reply-To: <20230630122551.21766-5-anjo@rev.ng> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2a00:1450:4864:20::135; envelope-from=richard.henderson@linaro.org; helo=mail-lf1-x135.google.com X-Spam_score_int: -21 X-Spam_score: -2.2 X-Spam_bar: -- X-Spam_report: (-2.2 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.095, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 6/30/23 14:25, Anton Johansson wrote: > For reasons related to code-generation quality, the offset of > CPUTLBDescFast and IcountDecr from CPUArchState needs to fit within > 11 bits of displacement (arm[32|64] and riscv addressing modes). > > This commit introduces a new constant to store the maximum allowed > negative offset, so it can be statically asserted to hold later on. > > Signed-off-by: Anton Johansson > --- > include/hw/core/cpu.h | 11 +++++++++++ > 1 file changed, 11 insertions(+) > > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h > index c226d7263c..0377f74d48 100644 > --- a/include/hw/core/cpu.h > +++ b/include/hw/core/cpu.h > @@ -259,6 +259,17 @@ struct qemu_work_item; > > #define CPU_UNSET_NUMA_NODE_ID -1 > > +/* > + * For reasons related to code-generation quality the fast path > + * CPUTLBDescFast array and IcountDecr fields need to be located within a > + * small negative offset of CPUArchState. This requirement comes from > + * host-specific addressing modes of arm[32|64] and riscv which uses 12- > + * and 11 bits of displacement respectively. > + */ > +#define CPU_MIN_DISPLACEMENT_BITS 11 > +#define CPU_MAX_NEGATIVE_ENV_OFFSET \ > + (-(1 << CPU_MIN_DISPLACEMENT_BITS)) You'd want 6 bits, for AArch64 LDP (7-bit signed immediate). r~