* [PULL 1/5] loongarch: mark loongarch_ipi_iocsr re-entrnacy safe
2023-05-15 11:19 [PULL 0/5] loongarch-to-apply queue Song Gao
@ 2023-05-15 11:19 ` Song Gao
2023-05-15 11:19 ` [PULL 2/5] tests/avocado: Add LoongArch machine start test Song Gao
` (4 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Song Gao @ 2023-05-15 11:19 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, Alexander Bulekov
From: Alexander Bulekov <alxndr@bu.edu>
loongarch_ipi_iocsr MRs rely on re-entrant IO through the ipi_send
function. As such, mark these MRs re-entrancy-safe.
Fixes: a2e1753b80 ("memory: prevent dma-reentracy issues")
Signed-off-by: Alexander Bulekov <alxndr@bu.edu>
Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230506112145.3563708-1-alxndr@bu.edu>
Signed-off-by: Song Gao <gaosong@loongson.cn>
---
hw/intc/loongarch_ipi.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
index bdba0f8107..9de7c01e11 100644
--- a/hw/intc/loongarch_ipi.c
+++ b/hw/intc/loongarch_ipi.c
@@ -215,6 +215,10 @@ static void loongarch_ipi_init(Object *obj)
for (cpu = 0; cpu < MAX_IPI_CORE_NUM; cpu++) {
memory_region_init_io(&s->ipi_iocsr_mem[cpu], obj, &loongarch_ipi_ops,
&lams->ipi_core[cpu], "loongarch_ipi_iocsr", 0x48);
+
+ /* loongarch_ipi_iocsr performs re-entrant IO through ipi_send */
+ s->ipi_iocsr_mem[cpu].disable_reentrancy_guard = true;
+
sysbus_init_mmio(sbd, &s->ipi_iocsr_mem[cpu]);
memory_region_init_io(&s->ipi64_iocsr_mem[cpu], obj, &loongarch_ipi64_ops,
--
2.39.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PULL 2/5] tests/avocado: Add LoongArch machine start test
2023-05-15 11:19 [PULL 0/5] loongarch-to-apply queue Song Gao
2023-05-15 11:19 ` [PULL 1/5] loongarch: mark loongarch_ipi_iocsr re-entrnacy safe Song Gao
@ 2023-05-15 11:19 ` Song Gao
2024-05-29 10:31 ` Thomas Huth
2023-05-15 11:19 ` [PULL 3/5] hw/loongarch/virt: Modify ipi as percpu device Song Gao
` (3 subsequent siblings)
5 siblings, 1 reply; 13+ messages in thread
From: Song Gao @ 2023-05-15 11:19 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, Thomas Huth, Cédric Le Goater
Add a new test in tests/avocado to check LoongArch virt machine start.
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Message-Id: <20230513012744.1885728-1-gaosong@loongson.cn>
---
MAINTAINERS | 1 +
tests/avocado/machine_loongarch.py | 58 ++++++++++++++++++++++++++++++
2 files changed, 59 insertions(+)
create mode 100644 tests/avocado/machine_loongarch.py
diff --git a/MAINTAINERS b/MAINTAINERS
index ff2aa53bb9..50585117a0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -245,6 +245,7 @@ M: Xiaojuan Yang <yangxiaojuan@loongson.cn>
S: Maintained
F: target/loongarch/
F: tests/tcg/loongarch64/
+F: tests/avocado/machine_loongarch.py
M68K TCG CPUs
M: Laurent Vivier <laurent@vivier.eu>
diff --git a/tests/avocado/machine_loongarch.py b/tests/avocado/machine_loongarch.py
new file mode 100644
index 0000000000..7d8a3c1fa5
--- /dev/null
+++ b/tests/avocado/machine_loongarch.py
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+#
+# LoongArch virt test.
+#
+# Copyright (c) 2023 Loongson Technology Corporation Limited
+#
+
+from avocado_qemu import QemuSystemTest
+from avocado_qemu import exec_command_and_wait_for_pattern
+from avocado_qemu import wait_for_console_pattern
+
+class LoongArchMachine(QemuSystemTest):
+ KERNEL_COMMON_COMMAND_LINE = 'printk.time=0 '
+
+ timeout = 120
+
+ def wait_for_console_pattern(self, success_message, vm=None):
+ wait_for_console_pattern(self, success_message,
+ failure_message='Kernel panic - not syncing',
+ vm=vm)
+
+ def test_loongarch64_devices(self):
+
+ """
+ :avocado: tags=arch:loongarch64
+ :avocado: tags=machine:virt
+ """
+
+ kernel_url = ('https://github.com/yangxiaojuan-loongson/qemu-binary/'
+ 'releases/download/binary-files/vmlinuz.efi')
+ kernel_hash = '951b485b16e3788b6db03a3e1793c067009e31a2'
+ kernel_path = self.fetch_asset(kernel_url, asset_hash=kernel_hash)
+
+ initrd_url = ('https://github.com/yangxiaojuan-loongson/qemu-binary/'
+ 'releases/download/binary-files/ramdisk')
+ initrd_hash = 'c67658d9b2a447ce7db2f73ba3d373c9b2b90ab2'
+ initrd_path = self.fetch_asset(initrd_url, asset_hash=initrd_hash)
+
+ bios_url = ('https://github.com/yangxiaojuan-loongson/qemu-binary/'
+ 'releases/download/binary-files/QEMU_EFI.fd')
+ bios_hash = ('dfc1bfba4853cd763b9d392d0031827e8addbca8')
+ bios_path = self.fetch_asset(bios_url, asset_hash=bios_hash)
+
+ self.vm.set_console()
+ kernel_command_line = (self.KERNEL_COMMON_COMMAND_LINE +
+ 'root=/dev/ram rdinit=/sbin/init console=ttyS0,115200')
+ self.vm.add_args('-nographic',
+ '-smp', '4',
+ '-m', '1024',
+ '-cpu', 'la464',
+ '-kernel', kernel_path,
+ '-initrd', initrd_path,
+ '-bios', bios_path,
+ '-append', kernel_command_line)
+ self.vm.launch()
+ self.wait_for_console_pattern('Run /sbin/init as init process')
+ exec_command_and_wait_for_pattern(self, 'cat /proc/cpuinfo',
+ 'processor : 3')
--
2.39.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: tests/avocado: Add LoongArch machine start test
2023-05-15 11:19 ` [PULL 2/5] tests/avocado: Add LoongArch machine start test Song Gao
@ 2024-05-29 10:31 ` Thomas Huth
2024-05-30 13:00 ` gaosong
0 siblings, 1 reply; 13+ messages in thread
From: Thomas Huth @ 2024-05-29 10:31 UTC (permalink / raw)
To: Song Gao, Xiaojuan Yang; +Cc: qemu-devel
On 15/05/2023 13.19, Song Gao wrote:
> Add a new test in tests/avocado to check LoongArch virt machine start.
>
> Reviewed-by: Thomas Huth <thuth@redhat.com>
> Signed-off-by: Song Gao <gaosong@loongson.cn>
> Reviewed-by: Cédric Le Goater <clg@redhat.com>
> Message-Id: <20230513012744.1885728-1-gaosong@loongson.cn>
> ---
> MAINTAINERS | 1 +
> tests/avocado/machine_loongarch.py | 58 ++++++++++++++++++++++++++++++
> 2 files changed, 59 insertions(+)
> create mode 100644 tests/avocado/machine_loongarch.py
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index ff2aa53bb9..50585117a0 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -245,6 +245,7 @@ M: Xiaojuan Yang <yangxiaojuan@loongson.cn>
> S: Maintained
> F: target/loongarch/
> F: tests/tcg/loongarch64/
> +F: tests/avocado/machine_loongarch.py
>
> M68K TCG CPUs
> M: Laurent Vivier <laurent@vivier.eu>
> diff --git a/tests/avocado/machine_loongarch.py b/tests/avocado/machine_loongarch.py
> new file mode 100644
> index 0000000000..7d8a3c1fa5
> --- /dev/null
> +++ b/tests/avocado/machine_loongarch.py
> @@ -0,0 +1,58 @@
> +# SPDX-License-Identifier: GPL-2.0-or-later
> +#
> +# LoongArch virt test.
> +#
> +# Copyright (c) 2023 Loongson Technology Corporation Limited
> +#
> +
> +from avocado_qemu import QemuSystemTest
> +from avocado_qemu import exec_command_and_wait_for_pattern
> +from avocado_qemu import wait_for_console_pattern
> +
> +class LoongArchMachine(QemuSystemTest):
> + KERNEL_COMMON_COMMAND_LINE = 'printk.time=0 '
> +
> + timeout = 120
> +
> + def wait_for_console_pattern(self, success_message, vm=None):
> + wait_for_console_pattern(self, success_message,
> + failure_message='Kernel panic - not syncing',
> + vm=vm)
> +
> + def test_loongarch64_devices(self):
> +
> + """
> + :avocado: tags=arch:loongarch64
> + :avocado: tags=machine:virt
> + """
> +
> + kernel_url = ('https://github.com/yangxiaojuan-loongson/qemu-binary/'
> + 'releases/download/binary-files/vmlinuz.efi')
> + kernel_hash = '951b485b16e3788b6db03a3e1793c067009e31a2'
> + kernel_path = self.fetch_asset(kernel_url, asset_hash=kernel_hash)
> +
> + initrd_url = ('https://github.com/yangxiaojuan-loongson/qemu-binary/'
> + 'releases/download/binary-files/ramdisk')
> + initrd_hash = 'c67658d9b2a447ce7db2f73ba3d373c9b2b90ab2'
> + initrd_path = self.fetch_asset(initrd_url, asset_hash=initrd_hash)
> +
> + bios_url = ('https://github.com/yangxiaojuan-loongson/qemu-binary/'
> + 'releases/download/binary-files/QEMU_EFI.fd')
> + bios_hash = ('dfc1bfba4853cd763b9d392d0031827e8addbca8')
> + bios_path = self.fetch_asset(bios_url, asset_hash=bios_hash)
Hi!
FYI, the test does not seem to work anymore - apparently the binaries have
changed and now the hashes do not match anymore. Could you please update it?
(preferably with some versioned binaries that do not change in the course of
time?)
Thank you very much!
Thomas
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: tests/avocado: Add LoongArch machine start test
2024-05-29 10:31 ` Thomas Huth
@ 2024-05-30 13:00 ` gaosong
2024-05-30 13:16 ` Jiaxun Yang
0 siblings, 1 reply; 13+ messages in thread
From: gaosong @ 2024-05-30 13:00 UTC (permalink / raw)
To: Thomas Huth, Xiaojuan Yang; +Cc: qemu-devel
在 2024/5/29 下午6:31, Thomas Huth 写道:
> On 15/05/2023 13.19, Song Gao wrote:
>> Add a new test in tests/avocado to check LoongArch virt machine start.
>>
>> Reviewed-by: Thomas Huth <thuth@redhat.com>
>> Signed-off-by: Song Gao <gaosong@loongson.cn>
>> Reviewed-by: Cédric Le Goater <clg@redhat.com>
>> Message-Id: <20230513012744.1885728-1-gaosong@loongson.cn>
>> ---
>> MAINTAINERS | 1 +
>> tests/avocado/machine_loongarch.py | 58 ++++++++++++++++++++++++++++++
>> 2 files changed, 59 insertions(+)
>> create mode 100644 tests/avocado/machine_loongarch.py
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index ff2aa53bb9..50585117a0 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -245,6 +245,7 @@ M: Xiaojuan Yang <yangxiaojuan@loongson.cn>
>> S: Maintained
>> F: target/loongarch/
>> F: tests/tcg/loongarch64/
>> +F: tests/avocado/machine_loongarch.py
>> M68K TCG CPUs
>> M: Laurent Vivier <laurent@vivier.eu>
>> diff --git a/tests/avocado/machine_loongarch.py
>> b/tests/avocado/machine_loongarch.py
>> new file mode 100644
>> index 0000000000..7d8a3c1fa5
>> --- /dev/null
>> +++ b/tests/avocado/machine_loongarch.py
>> @@ -0,0 +1,58 @@
>> +# SPDX-License-Identifier: GPL-2.0-or-later
>> +#
>> +# LoongArch virt test.
>> +#
>> +# Copyright (c) 2023 Loongson Technology Corporation Limited
>> +#
>> +
>> +from avocado_qemu import QemuSystemTest
>> +from avocado_qemu import exec_command_and_wait_for_pattern
>> +from avocado_qemu import wait_for_console_pattern
>> +
>> +class LoongArchMachine(QemuSystemTest):
>> + KERNEL_COMMON_COMMAND_LINE = 'printk.time=0 '
>> +
>> + timeout = 120
>> +
>> + def wait_for_console_pattern(self, success_message, vm=None):
>> + wait_for_console_pattern(self, success_message,
>> + failure_message='Kernel panic - not
>> syncing',
>> + vm=vm)
>> +
>> + def test_loongarch64_devices(self):
>> +
>> + """
>> + :avocado: tags=arch:loongarch64
>> + :avocado: tags=machine:virt
>> + """
>> +
>> + kernel_url =
>> ('https://github.com/yangxiaojuan-loongson/qemu-binary/'
>> + 'releases/download/binary-files/vmlinuz.efi')
>> + kernel_hash = '951b485b16e3788b6db03a3e1793c067009e31a2'
>> + kernel_path = self.fetch_asset(kernel_url,
>> asset_hash=kernel_hash)
>> +
>> + initrd_url =
>> ('https://github.com/yangxiaojuan-loongson/qemu-binary/'
>> + 'releases/download/binary-files/ramdisk')
>> + initrd_hash = 'c67658d9b2a447ce7db2f73ba3d373c9b2b90ab2'
>> + initrd_path = self.fetch_asset(initrd_url,
>> asset_hash=initrd_hash)
>> +
>> + bios_url =
>> ('https://github.com/yangxiaojuan-loongson/qemu-binary/'
>> + 'releases/download/binary-files/QEMU_EFI.fd')
>> + bios_hash = ('dfc1bfba4853cd763b9d392d0031827e8addbca8')
>> + bios_path = self.fetch_asset(bios_url, asset_hash=bios_hash)
>
> Hi!
>
> FYI, the test does not seem to work anymore - apparently the binaries
> have changed and now the hashes do not match anymore. Could you please
> update it? (preferably with some versioned binaries that do not change
> in the course of time?)
>
Thank you, I had send a patch to fix it.
Thanks.
Song Gao
^ permalink raw reply [flat|nested] 13+ messages in thread* Re: tests/avocado: Add LoongArch machine start test
2024-05-30 13:00 ` gaosong
@ 2024-05-30 13:16 ` Jiaxun Yang
2024-05-31 1:52 ` gaosong
0 siblings, 1 reply; 13+ messages in thread
From: Jiaxun Yang @ 2024-05-30 13:16 UTC (permalink / raw)
To: gaosong, Thomas Huth, Xiaojuan Yang; +Cc: QEMU devel
在2024年5月30日五月 下午2:00，gaosong写道：
[...]
>> FYI, the test does not seem to work anymore - apparently the binaries
>> have changed and now the hashes do not match anymore. Could you please
>> update it? (preferably with some versioned binaries that do not change
>> in the course of time?)
>>
> Thank you, I had send a patch to fix it.
Hi Song,
As LoongArch EDK2 support has been merged long ago, do you to make a clean
build and add it to pc-bios directory?
Thanks
- Jiaxun
>
> Thanks.
> Song Gao
--
- Jiaxun
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: tests/avocado: Add LoongArch machine start test
2024-05-30 13:16 ` Jiaxun Yang
@ 2024-05-31 1:52 ` gaosong
2024-05-31 5:34 ` Jiaxun Yang
0 siblings, 1 reply; 13+ messages in thread
From: gaosong @ 2024-05-31 1:52 UTC (permalink / raw)
To: Jiaxun Yang, Thomas Huth, Xiaojuan Yang
Cc: QEMU devel, Chao Li, bibo mao, xianglai li
在 2024/5/30 下午9:16, Jiaxun Yang 写道:
>
> 在2024年5月30日五月 下午2:00，gaosong写道：
> [...]
>>> FYI, the test does not seem to work anymore - apparently the binaries
>>> have changed and now the hashes do not match anymore. Could you please
>>> update it? (preferably with some versioned binaries that do not change
>>> in the course of time?)
>>>
>> Thank you, I had send a patch to fix it.
> Hi Song,
>
> As LoongArch EDK2 support has been merged long ago, do you to make a clean
> build and add it to pc-bios directory?
EDK2 LoongArchVirt under OvmfPkg is being committed to upstream.
PR:
https://github.com/tianocore/edk2/pull/5208
Thanks
Song Gao
>
> Thanks
> - Jiaxun
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: tests/avocado: Add LoongArch machine start test
2024-05-31 1:52 ` gaosong
@ 2024-05-31 5:34 ` Jiaxun Yang
2024-05-31 8:38 ` gaosong
0 siblings, 1 reply; 13+ messages in thread
From: Jiaxun Yang @ 2024-05-31 5:34 UTC (permalink / raw)
To: gaosong, Thomas Huth, Xiaojuan Yang
Cc: QEMU devel, Chao Li, Bibo Mao, xianglai li
在2024年5月31日五月 上午2:52，gaosong写道：
> 在 2024/5/30 下午9:16, Jiaxun Yang 写道:
>>
>> 在2024年5月30日五月 下午2:00，gaosong写道：
>> [...]
>>>> FYI, the test does not seem to work anymore - apparently the binaries
>>>> have changed and now the hashes do not match anymore. Could you please
>>>> update it? (preferably with some versioned binaries that do not change
>>>> in the course of time?)
>>>>
>>> Thank you, I had send a patch to fix it.
>> Hi Song,
>>
>> As LoongArch EDK2 support has been merged long ago, do you to make a clean
>> build and add it to pc-bios directory?
> EDK2 LoongArchVirt under OvmfPkg is being committed to upstream.
>
> PR:
> https://github.com/tianocore/edk2/pull/5208
I meant here:
https://gitlab.com/qemu-project/qemu/-/tree/master/pc-bios?ref_type=heads
Thanks
>
> Thanks
> Song Gao
>>
>> Thanks
>> - Jiaxun
--
- Jiaxun
^ permalink raw reply [flat|nested] 13+ messages in thread
* Re: tests/avocado: Add LoongArch machine start test
2024-05-31 5:34 ` Jiaxun Yang
@ 2024-05-31 8:38 ` gaosong
0 siblings, 0 replies; 13+ messages in thread
From: gaosong @ 2024-05-31 8:38 UTC (permalink / raw)
To: Jiaxun Yang, Thomas Huth, Xiaojuan Yang
Cc: QEMU devel, Chao Li, Bibo Mao, xianglai li,
Philippe Mathieu-Daudé, Gerd Hoffmann
在 2024/5/31 下午1:34, Jiaxun Yang 写道:
>
> 在2024年5月31日五月 上午2:52，gaosong写道：
>> 在 2024/5/30 下午9:16, Jiaxun Yang 写道:
>>> 在2024年5月30日五月 下午2:00，gaosong写道：
>>> [...]
>>>>> FYI, the test does not seem to work anymore - apparently the binaries
>>>>> have changed and now the hashes do not match anymore. Could you please
>>>>> update it? (preferably with some versioned binaries that do not change
>>>>> in the course of time?)
>>>>>
>>>> Thank you, I had send a patch to fix it.
>>> Hi Song,
>>>
>>> As LoongArch EDK2 support has been merged long ago, do you to make a clean
>>> build and add it to pc-bios directory?
>> EDK2 LoongArchVirt under OvmfPkg is being committed to upstream.
>>
>> PR:
>> https://github.com/tianocore/edk2/pull/5208
> I meant here:
>
> https://gitlab.com/qemu-project/qemu/-/tree/master/pc-bios?ref_type=heads
Sorry, I didn't explain it well.
We already send a patch[1] to the QEMU community, this patch create a
submodule 'roms/edk2-platform',
because the LoongArch BIOS code is all in edk2-platform repo. but the
QEMU community think that
the edk2-platform project is too large. so we plan to move the LoongArch
BIOS code from edk2-platfrom to the edk2 repo.
The PR[2] is to move edk2-platform to edk2 repo. but not merged in yet.
[1]:
https://patchew.org/QEMU/260307952ffe5382a55d66a4999034490e04f7df.1691653307.git.lixianglai@loongson.cn/
[2]: https://github.com/tianocore/edk2/pull/5208
Related Discussions :
https://lore.kernel.org/all/1f1d3d9f-c3df-4f29-df66-886410994cc3@xen0n.name/
Thanks.
Song Gao
>>> Thanks
>>> - Jiaxun
^ permalink raw reply [flat|nested] 13+ messages in thread
* [PULL 3/5] hw/loongarch/virt: Modify ipi as percpu device
2023-05-15 11:19 [PULL 0/5] loongarch-to-apply queue Song Gao
2023-05-15 11:19 ` [PULL 1/5] loongarch: mark loongarch_ipi_iocsr re-entrnacy safe Song Gao
2023-05-15 11:19 ` [PULL 2/5] tests/avocado: Add LoongArch machine start test Song Gao
@ 2023-05-15 11:19 ` Song Gao
2023-05-15 11:19 ` [PULL 4/5] hw/loongarch/virt: Set max 256 cpus support on loongarch virt machine Song Gao
` (2 subsequent siblings)
5 siblings, 0 replies; 13+ messages in thread
From: Song Gao @ 2023-05-15 11:19 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, Philippe Mathieu-Daudé
ipi is used to communicate between cpus, this patch modified
loongarch ipi device as percpu device, so that there are
2 MemoryRegions with ipi device, rather than 2*cpus
MemoryRegions, which may be large than QDEV_MAX_MMIO if
more cpus are added on loongarch virt machine.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230512100421.1867848-2-gaosong@loongson.cn>
---
hw/intc/loongarch_ipi.c | 44 ++++++++++++---------------------
hw/loongarch/virt.c | 12 ++++-----
include/hw/intc/loongarch_ipi.h | 10 +++-----
include/hw/loongarch/virt.h | 1 -
4 files changed, 26 insertions(+), 41 deletions(-)
diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
index 9de7c01e11..054e143842 100644
--- a/hw/intc/loongarch_ipi.c
+++ b/hw/intc/loongarch_ipi.c
@@ -201,55 +201,43 @@ static const MemoryRegionOps loongarch_ipi64_ops = {
static void loongarch_ipi_init(Object *obj)
{
- int cpu;
- LoongArchMachineState *lams;
LoongArchIPI *s = LOONGARCH_IPI(obj);
SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
- Object *machine = qdev_get_machine();
- ObjectClass *mc = object_get_class(machine);
- /* 'lams' should be initialized */
- if (!strcmp(MACHINE_CLASS(mc)->name, "none")) {
- return;
- }
- lams = LOONGARCH_MACHINE(machine);
- for (cpu = 0; cpu < MAX_IPI_CORE_NUM; cpu++) {
- memory_region_init_io(&s->ipi_iocsr_mem[cpu], obj, &loongarch_ipi_ops,
- &lams->ipi_core[cpu], "loongarch_ipi_iocsr", 0x48);
- /* loongarch_ipi_iocsr performs re-entrant IO through ipi_send */
- s->ipi_iocsr_mem[cpu].disable_reentrancy_guard = true;
+ memory_region_init_io(&s->ipi_iocsr_mem, obj, &loongarch_ipi_ops,
+ &s->ipi_core, "loongarch_ipi_iocsr", 0x48);
- sysbus_init_mmio(sbd, &s->ipi_iocsr_mem[cpu]);
+ /* loongarch_ipi_iocsr performs re-entrant IO through ipi_send */
+ s->ipi_iocsr_mem.disable_reentrancy_guard = true;
- memory_region_init_io(&s->ipi64_iocsr_mem[cpu], obj, &loongarch_ipi64_ops,
- &lams->ipi_core[cpu], "loongarch_ipi64_iocsr", 0x118);
- sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem[cpu]);
- qdev_init_gpio_out(DEVICE(obj), &lams->ipi_core[cpu].irq, 1);
- }
+ sysbus_init_mmio(sbd, &s->ipi_iocsr_mem);
+
+ memory_region_init_io(&s->ipi64_iocsr_mem, obj, &loongarch_ipi64_ops,
+ &s->ipi_core, "loongarch_ipi64_iocsr", 0x118);
+ sysbus_init_mmio(sbd, &s->ipi64_iocsr_mem);
+ qdev_init_gpio_out(DEVICE(obj), &s->ipi_core.irq, 1);
}
static const VMStateDescription vmstate_ipi_core = {
.name = "ipi-single",
- .version_id = 0,
- .minimum_version_id = 0,
+ .version_id = 1,
+ .minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32(status, IPICore),
VMSTATE_UINT32(en, IPICore),
VMSTATE_UINT32(set, IPICore),
VMSTATE_UINT32(clear, IPICore),
- VMSTATE_UINT32_ARRAY(buf, IPICore, MAX_IPI_MBX_NUM * 2),
+ VMSTATE_UINT32_ARRAY(buf, IPICore, 2),
VMSTATE_END_OF_LIST()
}
};
static const VMStateDescription vmstate_loongarch_ipi = {
.name = TYPE_LOONGARCH_IPI,
- .version_id = 0,
- .minimum_version_id = 0,
+ .version_id = 1,
+ .minimum_version_id = 1,
.fields = (VMStateField[]) {
- VMSTATE_STRUCT_ARRAY(ipi_core, LoongArchMachineState,
- MAX_IPI_CORE_NUM, 0,
- vmstate_ipi_core, IPICore),
+ VMSTATE_STRUCT(ipi_core, LoongArchIPI, 0, vmstate_ipi_core, IPICore),
VMSTATE_END_OF_LIST()
}
};
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index f4bf14c1c8..c8a01b1fb6 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -565,9 +565,6 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
CPUState *cpu_state;
int cpu, pin, i, start, num;
- ipi = qdev_new(TYPE_LOONGARCH_IPI);
- sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
-
extioi = qdev_new(TYPE_LOONGARCH_EXTIOI);
sysbus_realize_and_unref(SYS_BUS_DEVICE(extioi), &error_fatal);
@@ -598,15 +595,18 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
lacpu = LOONGARCH_CPU(cpu_state);
env = &(lacpu->env);
+ ipi = qdev_new(TYPE_LOONGARCH_IPI);
+ sysbus_realize_and_unref(SYS_BUS_DEVICE(ipi), &error_fatal);
+
/* connect ipi irq to cpu irq */
- qdev_connect_gpio_out(ipi, cpu, qdev_get_gpio_in(cpudev, IRQ_IPI));
+ qdev_connect_gpio_out(ipi, 0, qdev_get_gpio_in(cpudev, IRQ_IPI));
/* IPI iocsr memory region */
memory_region_add_subregion(&env->system_iocsr, SMP_IPI_MAILBOX,
sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi),
- cpu * 2));
+ 0));
memory_region_add_subregion(&env->system_iocsr, MAIL_SEND_ADDR,
sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi),
- cpu * 2 + 1));
+ 1));
/* extioi iocsr memory region */
memory_region_add_subregion(&env->system_iocsr, APIC_BASE,
sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi),
diff --git a/include/hw/intc/loongarch_ipi.h b/include/hw/intc/loongarch_ipi.h
index 0ee48fca55..664e050b92 100644
--- a/include/hw/intc/loongarch_ipi.h
+++ b/include/hw/intc/loongarch_ipi.h
@@ -28,9 +28,6 @@
#define MAIL_SEND_OFFSET 0
#define ANY_SEND_OFFSET (IOCSR_ANY_SEND - IOCSR_MAIL_SEND)
-#define MAX_IPI_CORE_NUM 4
-#define MAX_IPI_MBX_NUM 4
-
#define TYPE_LOONGARCH_IPI "loongarch_ipi"
OBJECT_DECLARE_SIMPLE_TYPE(LoongArchIPI, LOONGARCH_IPI)
@@ -40,14 +37,15 @@ typedef struct IPICore {
uint32_t set;
uint32_t clear;
/* 64bit buf divide into 2 32bit buf */
- uint32_t buf[MAX_IPI_MBX_NUM * 2];
+ uint32_t buf[2];
qemu_irq irq;
} IPICore;
struct LoongArchIPI {
SysBusDevice parent_obj;
- MemoryRegion ipi_iocsr_mem[MAX_IPI_CORE_NUM];
- MemoryRegion ipi64_iocsr_mem[MAX_IPI_CORE_NUM];
+ MemoryRegion ipi_iocsr_mem;
+ MemoryRegion ipi64_iocsr_mem;
+ IPICore ipi_core;
};
#endif
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 7ae8a91229..54a9f595bb 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -36,7 +36,6 @@ struct LoongArchMachineState {
/*< private >*/
MachineState parent_obj;
- IPICore ipi_core[MAX_IPI_CORE_NUM];
MemoryRegion lowmem;
MemoryRegion highmem;
MemoryRegion isa_io;
--
2.39.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PULL 4/5] hw/loongarch/virt: Set max 256 cpus support on loongarch virt machine
2023-05-15 11:19 [PULL 0/5] loongarch-to-apply queue Song Gao
` (2 preceding siblings ...)
2023-05-15 11:19 ` [PULL 3/5] hw/loongarch/virt: Modify ipi as percpu device Song Gao
@ 2023-05-15 11:19 ` Song Gao
2023-05-15 11:19 ` [PULL 5/5] hw/intc: Add NULL pointer check on LoongArch ipi device Song Gao
2023-05-15 17:13 ` [PULL 0/5] loongarch-to-apply queue Richard Henderson
5 siblings, 0 replies; 13+ messages in thread
From: Song Gao @ 2023-05-15 11:19 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, Philippe Mathieu-Daudé
Add separate macro EXTIOI_CPUS for extioi interrupt controller, extioi
only supports 4 cpu. And set macro LOONGARCH_MAX_CPUS as 256 so that
loongarch virt machine supports more cpus.
Interrupts from external devices can only be routed cpu 0-3 because
of extioi limits, cpu internal interrupt such as timer/ipi can be
triggered on all cpus.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230512100421.1867848-3-gaosong@loongson.cn>
---
hw/intc/loongarch_extioi.c | 4 ++--
hw/loongarch/virt.c | 13 +++++++++----
include/hw/intc/loongarch_extioi.h | 10 ++++++----
include/hw/loongarch/virt.h | 2 +-
4 files changed, 18 insertions(+), 11 deletions(-)
diff --git a/hw/intc/loongarch_extioi.c b/hw/intc/loongarch_extioi.c
index 4b8ec3f28a..0e7a3e32f3 100644
--- a/hw/intc/loongarch_extioi.c
+++ b/hw/intc/loongarch_extioi.c
@@ -254,7 +254,7 @@ static const VMStateDescription vmstate_loongarch_extioi = {
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32_ARRAY(bounce, LoongArchExtIOI, EXTIOI_IRQS_GROUP_COUNT),
- VMSTATE_UINT32_2DARRAY(coreisr, LoongArchExtIOI, LOONGARCH_MAX_VCPUS,
+ VMSTATE_UINT32_2DARRAY(coreisr, LoongArchExtIOI, EXTIOI_CPUS,
EXTIOI_IRQS_GROUP_COUNT),
VMSTATE_UINT32_ARRAY(nodetype, LoongArchExtIOI,
EXTIOI_IRQS_NODETYPE_COUNT / 2),
@@ -281,7 +281,7 @@ static void loongarch_extioi_instance_init(Object *obj)
qdev_init_gpio_in(DEVICE(obj), extioi_setirq, EXTIOI_IRQS);
- for (cpu = 0; cpu < LOONGARCH_MAX_VCPUS; cpu++) {
+ for (cpu = 0; cpu < EXTIOI_CPUS; cpu++) {
memory_region_init_io(&s->extioi_iocsr_mem[cpu], OBJECT(s), &extioi_ops,
s, "extioi_iocsr", 0x900);
sysbus_init_mmio(SYS_BUS_DEVICE(dev), &s->extioi_iocsr_mem[cpu]);
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index c8a01b1fb6..2b7588e32a 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loongarch/virt.c
@@ -607,8 +607,13 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
memory_region_add_subregion(&env->system_iocsr, MAIL_SEND_ADDR,
sysbus_mmio_get_region(SYS_BUS_DEVICE(ipi),
1));
- /* extioi iocsr memory region */
- memory_region_add_subregion(&env->system_iocsr, APIC_BASE,
+ /*
+ * extioi iocsr memory region
+ * only one extioi is added on loongarch virt machine
+ * external device interrupt can only be routed to cpu 0-3
+ */
+ if (cpu < EXTIOI_CPUS)
+ memory_region_add_subregion(&env->system_iocsr, APIC_BASE,
sysbus_mmio_get_region(SYS_BUS_DEVICE(extioi),
cpu));
}
@@ -617,7 +622,7 @@ static void loongarch_irq_init(LoongArchMachineState *lams)
* connect ext irq to the cpu irq
* cpu_pin[9:2] <= intc_pin[7:0]
*/
- for (cpu = 0; cpu < ms->smp.cpus; cpu++) {
+ for (cpu = 0; cpu < MIN(ms->smp.cpus, EXTIOI_CPUS); cpu++) {
cpudev = DEVICE(qemu_get_cpu(cpu));
for (pin = 0; pin < LS3A_INTC_IP; pin++) {
qdev_connect_gpio_out(extioi, (cpu * 8 + pin),
@@ -1026,7 +1031,7 @@ static void loongarch_class_init(ObjectClass *oc, void *data)
mc->default_ram_size = 1 * GiB;
mc->default_cpu_type = LOONGARCH_CPU_TYPE_NAME("la464");
mc->default_ram_id = "loongarch.ram";
- mc->max_cpus = LOONGARCH_MAX_VCPUS;
+ mc->max_cpus = LOONGARCH_MAX_CPUS;
mc->is_default = 1;
mc->default_kernel_irqchip_split = false;
mc->block_default_type = IF_VIRTIO;
diff --git a/include/hw/intc/loongarch_extioi.h b/include/hw/intc/loongarch_extioi.h
index 15b8c999f6..fbdef9a7b3 100644
--- a/include/hw/intc/loongarch_extioi.h
+++ b/include/hw/intc/loongarch_extioi.h
@@ -14,6 +14,8 @@
#define LS3A_INTC_IP 8
#define EXTIOI_IRQS (256)
#define EXTIOI_IRQS_BITMAP_SIZE (256 / 8)
+/* irq from EXTIOI is routed to no more than 4 cpus */
+#define EXTIOI_CPUS (4)
/* map to ipnum per 32 irqs */
#define EXTIOI_IRQS_IPMAP_SIZE (256 / 32)
#define EXTIOI_IRQS_COREMAP_SIZE 256
@@ -46,17 +48,17 @@ struct LoongArchExtIOI {
uint32_t nodetype[EXTIOI_IRQS_NODETYPE_COUNT / 2];
uint32_t bounce[EXTIOI_IRQS_GROUP_COUNT];
uint32_t isr[EXTIOI_IRQS / 32];
- uint32_t coreisr[LOONGARCH_MAX_VCPUS][EXTIOI_IRQS_GROUP_COUNT];
+ uint32_t coreisr[EXTIOI_CPUS][EXTIOI_IRQS_GROUP_COUNT];
uint32_t enable[EXTIOI_IRQS / 32];
uint32_t ipmap[EXTIOI_IRQS_IPMAP_SIZE / 4];
uint32_t coremap[EXTIOI_IRQS / 4];
uint32_t sw_pending[EXTIOI_IRQS / 32];
- DECLARE_BITMAP(sw_isr[LOONGARCH_MAX_VCPUS][LS3A_INTC_IP], EXTIOI_IRQS);
+ DECLARE_BITMAP(sw_isr[EXTIOI_CPUS][LS3A_INTC_IP], EXTIOI_IRQS);
uint8_t sw_ipmap[EXTIOI_IRQS_IPMAP_SIZE];
uint8_t sw_coremap[EXTIOI_IRQS];
- qemu_irq parent_irq[LOONGARCH_MAX_VCPUS][LS3A_INTC_IP];
+ qemu_irq parent_irq[EXTIOI_CPUS][LS3A_INTC_IP];
qemu_irq irq[EXTIOI_IRQS];
- MemoryRegion extioi_iocsr_mem[LOONGARCH_MAX_VCPUS];
+ MemoryRegion extioi_iocsr_mem[EXTIOI_CPUS];
MemoryRegion extioi_system_mem;
};
#endif /* LOONGARCH_EXTIOI_H */
diff --git a/include/hw/loongarch/virt.h b/include/hw/loongarch/virt.h
index 54a9f595bb..f1659655c6 100644
--- a/include/hw/loongarch/virt.h
+++ b/include/hw/loongarch/virt.h
@@ -14,7 +14,7 @@
#include "hw/intc/loongarch_ipi.h"
#include "hw/block/flash.h"
-#define LOONGARCH_MAX_VCPUS 4
+#define LOONGARCH_MAX_CPUS 256
#define VIRT_ISA_IO_BASE 0x18000000UL
#define VIRT_ISA_IO_SIZE 0x0004000
--
2.39.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* [PULL 5/5] hw/intc: Add NULL pointer check on LoongArch ipi device
2023-05-15 11:19 [PULL 0/5] loongarch-to-apply queue Song Gao
` (3 preceding siblings ...)
2023-05-15 11:19 ` [PULL 4/5] hw/loongarch/virt: Set max 256 cpus support on loongarch virt machine Song Gao
@ 2023-05-15 11:19 ` Song Gao
2023-05-15 17:13 ` [PULL 0/5] loongarch-to-apply queue Richard Henderson
5 siblings, 0 replies; 13+ messages in thread
From: Song Gao @ 2023-05-15 11:19 UTC (permalink / raw)
To: qemu-devel; +Cc: richard.henderson, Philippe Mathieu-Daudé
When ipi mailbox is used, cpu_index is decoded from iocsr register.
cpu maybe does not exist. This patch adds NULL pointer check on
ipi device.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20230512100421.1867848-4-gaosong@loongson.cn>
---
hw/intc/loongarch_ipi.c | 40 +++++++++++++++++++++++++++++-----------
hw/intc/trace-events | 1 +
2 files changed, 30 insertions(+), 11 deletions(-)
diff --git a/hw/intc/loongarch_ipi.c b/hw/intc/loongarch_ipi.c
index 054e143842..d6ab91721e 100644
--- a/hw/intc/loongarch_ipi.c
+++ b/hw/intc/loongarch_ipi.c
@@ -77,31 +77,42 @@ static void send_ipi_data(CPULoongArchState *env, uint64_t val, hwaddr addr)
static void ipi_send(uint64_t val)
{
- int cpuid, data;
+ uint32_t cpuid;
+ uint8_t vector;
CPULoongArchState *env;
CPUState *cs;
LoongArchCPU *cpu;
- cpuid = (val >> 16) & 0x3ff;
+ cpuid = extract32(val, 16, 10);
+ if (cpuid >= LOONGARCH_MAX_CPUS) {
+ trace_loongarch_ipi_unsupported_cpuid("IOCSR_IPI_SEND", cpuid);
+ return;
+ }
+
/* IPI status vector */
- data = 1 << (val & 0x1f);
+ vector = extract8(val, 0, 5);
+
cs = qemu_get_cpu(cpuid);
cpu = LOONGARCH_CPU(cs);
env = &cpu->env;
address_space_stl(&env->address_space_iocsr, 0x1008,
- data, MEMTXATTRS_UNSPECIFIED, NULL);
-
+ BIT(vector), MEMTXATTRS_UNSPECIFIED, NULL);
}
static void mail_send(uint64_t val)
{
- int cpuid;
+ uint32_t cpuid;
hwaddr addr;
CPULoongArchState *env;
CPUState *cs;
LoongArchCPU *cpu;
- cpuid = (val >> 16) & 0x3ff;
+ cpuid = extract32(val, 16, 10);
+ if (cpuid >= LOONGARCH_MAX_CPUS) {
+ trace_loongarch_ipi_unsupported_cpuid("IOCSR_MAIL_SEND", cpuid);
+ return;
+ }
+
addr = 0x1020 + (val & 0x1c);
cs = qemu_get_cpu(cpuid);
cpu = LOONGARCH_CPU(cs);
@@ -111,14 +122,21 @@ static void mail_send(uint64_t val)
static void any_send(uint64_t val)
{
- int cpuid;
+ uint32_t cpuid;
hwaddr addr;
CPULoongArchState *env;
+ CPUState *cs;
+ LoongArchCPU *cpu;
+
+ cpuid = extract32(val, 16, 10);
+ if (cpuid >= LOONGARCH_MAX_CPUS) {
+ trace_loongarch_ipi_unsupported_cpuid("IOCSR_ANY_SEND", cpuid);
+ return;
+ }
- cpuid = (val >> 16) & 0x3ff;
addr = val & 0xffff;
- CPUState *cs = qemu_get_cpu(cpuid);
- LoongArchCPU *cpu = LOONGARCH_CPU(cs);
+ cs = qemu_get_cpu(cpuid);
+ cpu = LOONGARCH_CPU(cs);
env = &cpu->env;
send_ipi_data(env, val, addr);
}
diff --git a/hw/intc/trace-events b/hw/intc/trace-events
index 50cadfb996..5c6094c457 100644
--- a/hw/intc/trace-events
+++ b/hw/intc/trace-events
@@ -292,6 +292,7 @@ sh_intc_set(int id, int enable) "setting interrupt group %d to %d"
# loongarch_ipi.c
loongarch_ipi_read(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%"PRIx64
loongarch_ipi_write(unsigned size, uint64_t addr, uint64_t val) "size: %u addr: 0x%"PRIx64 "val: 0x%"PRIx64
+loongarch_ipi_unsupported_cpuid(const char *s, uint32_t cpuid) "%s unsupported cpuid 0x%" PRIx32
# loongarch_pch_pic.c
loongarch_pch_pic_irq_handler(int irq, int level) "irq %d level %d"
--
2.39.1
^ permalink raw reply related [flat|nested] 13+ messages in thread* Re: [PULL 0/5] loongarch-to-apply queue
2023-05-15 11:19 [PULL 0/5] loongarch-to-apply queue Song Gao
` (4 preceding siblings ...)
2023-05-15 11:19 ` [PULL 5/5] hw/intc: Add NULL pointer check on LoongArch ipi device Song Gao
@ 2023-05-15 17:13 ` Richard Henderson
5 siblings, 0 replies; 13+ messages in thread
From: Richard Henderson @ 2023-05-15 17:13 UTC (permalink / raw)
To: Song Gao, qemu-devel
On 5/15/23 04:19, Song Gao wrote:
> The following changes since commit 8844bb8d896595ee1d25d21c770e6e6f29803097:
>
> Merge tag 'or1k-pull-request-20230513' ofhttps://github.com/stffrdhrn/qemu into staging (2023-05-13 11:23:14 +0100)
>
> are available in the Git repository at:
>
> https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230515
>
> for you to fetch changes up to 7ef0eb35a4e6961d7e40f03f16ed241c95ae93f9:
>
> hw/intc: Add NULL pointer check on LoongArch ipi device (2023-05-15 19:09:33 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-20230515
Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate.
r~
^ permalink raw reply [flat|nested] 13+ messages in thread