From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1HRxMs-0003kx-Bn for qemu-devel@nongnu.org; Thu, 15 Mar 2007 17:20:14 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1HRxMq-0003et-BM for qemu-devel@nongnu.org; Thu, 15 Mar 2007 17:20:13 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1HRxMq-0003eU-6E for qemu-devel@nongnu.org; Thu, 15 Mar 2007 16:20:12 -0500 Received: from ik-out-1112.google.com ([66.249.90.177]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1HRxLn-0003Mj-BW for qemu-devel@nongnu.org; Thu, 15 Mar 2007 17:19:07 -0400 Received: by ik-out-1112.google.com with SMTP id c30so310730ika for ; Thu, 15 Mar 2007 14:19:06 -0700 (PDT) Message-ID: Date: Thu, 15 Mar 2007 18:19:02 -0300 From: "Rodrigo Vivi" Subject: Re: [Qemu-devel] qemu-arm: wrong execution of post-indexed loads when Rm and Rd are the same register In-Reply-To: <200703152110.39814.paul@codesourcery.com> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1173987324.9939.0.camel@edgy-laptop> <200703152003.21276.paul@codesourcery.com> <200703152110.39814.paul@codesourcery.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paul Brook Cc: Lauro Ramos Venancio , qemu-devel@nongnu.org On 3/15/07, Paul Brook wrote: > > > This is still wrong. > > > > So, is this a known bug? > > Still wrong implies it's a bug, and your patch does not fix it properly. I know that... I was not clear.. sorry... what I mean is: do you agree that there was a bug in these instructions? > > > > The writeback must happen after the load. > > > > We code like this because > > - we didn't find this restriction in arm reference manual > > It's the Abort model section you mention below. > > > - the LLVM uses this instruction expecting a result like this > > The compiler knows nothing about the abort behavior. The difference is only > visible if the load faults. > > > - That was the result that we got running these instructions in an OMAP1710 > > I suggest you check again. I'm fairly sure the arm926 implements the Base > Restored abort model. Actually we did not test the abort model... So, Base Restored abort model is the model that qemu implements, isn't it? then we will try to use that and recode the patch... thanks for your help > > Paul > vivijim