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From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Gustavo Romero <gustavo.romero@linaro.org>,
	qemu-devel@nongnu.org, alex.bennee@linaro.org,
	richard.henderson@linaro.org
Cc: peter.maydell@linaro.org
Subject: Re: [PATCH v4 5/9] target/arm: Make some MTE helpers widely available
Date: Mon, 24 Jun 2024 09:47:29 +0200	[thread overview]
Message-ID: <bdb11f59-43e5-4715-adfe-1a1a4d7bdf1f@linaro.org> (raw)
In-Reply-To: <20240624053046.221802-6-gustavo.romero@linaro.org>

Hi Gustavo,

On 24/6/24 07:30, Gustavo Romero wrote:
> Make the MTE helpers allocation_tag_mem_probe, load_tag1, and store_tag1
> available to other subsystems.

Again, you can make them available externally by removing the
static scope. I'm not keen anymore on inline function definitions,
please justify why you need them. Inline functions often requiere
more headers to be pulled in, and behind the preprocessing overhead,
it makes header maintenance more painful.

> Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/arm/tcg/mte_helper.c | 54 +++------------------------
>   target/arm/tcg/mte_helper.h | 74 +++++++++++++++++++++++++++++++++++++
>   2 files changed, 79 insertions(+), 49 deletions(-)
>   create mode 100644 target/arm/tcg/mte_helper.h


> diff --git a/target/arm/tcg/mte_helper.h b/target/arm/tcg/mte_helper.h
> new file mode 100644
> index 0000000000..6a82ff3403
> --- /dev/null
> +++ b/target/arm/tcg/mte_helper.h
> @@ -0,0 +1,74 @@
> +/*
> + * ARM MemTag operation helpers.
> + *
> + * This code is licensed under the GNU GPL v2 or later.
> + *
> + * SPDX-License-Identifier: LGPL-2.1-or-later
> + */
> +
> +#ifndef TARGET_ARM_MTE_H
> +#define TARGET_ARM_MTE_H
> +
> +/**
> + * allocation_tag_mem_probe:
> + * @env: the cpu environment
> + * @ptr_mmu_idx: the addressing regime to use for the virtual address
> + * @ptr: the virtual address for which to look up tag memory
> + * @ptr_access: the access to use for the virtual address
> + * @ptr_size: the number of bytes in the normal memory access
> + * @tag_access: the access to use for the tag memory
> + * @probe: true to merely probe, never taking an exception
> + * @ra: the return address for exception handling
> + *
> + * Our tag memory is formatted as a sequence of little-endian nibbles.
> + * That is, the byte at (addr >> (LOG2_TAG_GRANULE + 1)) contains two
> + * tags, with the tag at [3:0] for the lower addr and the tag at [7:4]
> + * for the higher addr.
> + *
> + * Here, resolve the physical address from the virtual address, and return
> + * a pointer to the corresponding tag byte.
> + *
> + * If there is no tag storage corresponding to @ptr, return NULL.
> + *
> + * If the page is inaccessible for @ptr_access, or has a watchpoint, there are
> + * three options:
> + * (1) probe = true, ra = 0 : pure probe -- we return NULL if the page is not
> + *     accessible, and do not take watchpoint traps. The calling code must
> + *     handle those cases in the right priority compared to MTE traps.
> + * (2) probe = false, ra = 0 : probe, no fault expected -- the caller guarantees
> + *     that the page is going to be accessible. We will take watchpoint traps.
> + * (3) probe = false, ra != 0 : non-probe -- we will take both memory access
> + *     traps and watchpoint traps.
> + * (probe = true, ra != 0 is invalid and will assert.)
> + */
> +uint8_t *allocation_tag_mem_probe(CPUARMState *env, int ptr_mmu_idx,
> +                                  uint64_t ptr, MMUAccessType ptr_access,
> +                                  int ptr_size, MMUAccessType tag_access,
> +                                  bool probe, uintptr_t ra);

Missing "exec/mmu-access-type.h" header.

> +
> +/**
> + * load_tag1 - Load 1 tag (nibble) from byte
> + * @ptr: The tagged address
> + * @mem: The tag address (packed, 2 tags in byte)
> + */
> +static inline int load_tag1(uint64_t ptr, uint8_t *mem)
> +{
> +    int ofs = extract32(ptr, LOG2_TAG_GRANULE, 1) * 4;
> +    return extract32(*mem, ofs, 4);
> +}
> +
> +/**
> + * store_tag1 - Store 1 tag (nibble) into byte
> + * @ptr: The tagged address
> + * @mem: The tag address (packed, 2 tags in byte)
> + * @tag: The tag to be stored in the nibble
> + *
> + * For use in a non-parallel context, store to the given nibble.
> + */
> +static inline void store_tag1(uint64_t ptr, uint8_t *mem, int tag)
> +{
> +    int ofs = extract32(ptr, LOG2_TAG_GRANULE, 1) * 4;
> +    *mem = deposit32(*mem, ofs, 4, tag);

If you want them inlined, then this is also missing the "qemu/bitops.h"
header.

> +}
> +
> +#endif /* TARGET_ARM_MTE_H */



  reply	other threads:[~2024-06-24  7:48 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-24  5:30 [PATCH v4 0/9] Add MTE stubs for aarch64 user mode Gustavo Romero
2024-06-24  5:30 ` [PATCH v4 1/9] gdbstub: Clean up process_string_cmd Gustavo Romero
2024-06-24  5:30 ` [PATCH v4 2/9] gdbstub: Move GdbCmdParseEntry into a new header file Gustavo Romero
2024-06-24  5:30 ` [PATCH v4 3/9] gdbstub: Add support for target-specific stubs Gustavo Romero
2024-06-24  5:30 ` [PATCH v4 4/9] target/arm: Fix exception case in allocation_tag_mem_probe Gustavo Romero
2024-06-24  5:30 ` [PATCH v4 5/9] target/arm: Make some MTE helpers widely available Gustavo Romero
2024-06-24  7:47   ` Philippe Mathieu-Daudé [this message]
2024-06-25 14:14     ` Philippe Mathieu-Daudé
2024-06-27  4:42     ` Gustavo Romero
2024-06-24  5:30 ` [PATCH v4 6/9] target/arm: Factor out code for setting MTE TCF0 field Gustavo Romero
2024-06-24  7:48   ` Philippe Mathieu-Daudé
2024-06-24  5:30 ` [PATCH v4 7/9] gdbstub: Make get cpu and hex conversion functions non-internal Gustavo Romero
2024-06-24  5:30 ` [PATCH v4 8/9] gdbstub: Add support for MTE in user mode Gustavo Romero
2024-06-24  5:30 ` [PATCH v4 9/9] tests/tcg/aarch64: Add MTE gdbstub tests Gustavo Romero

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