From: Richard Henderson <richard.henderson@linaro.org>
To: Xiaojuan Yang <yangxiaojuan@loongson.cn>, qemu-devel@nongnu.org
Cc: peter.maydell@linaro.org, thuth@redhat.com,
chenhuacai@loongson.cn, mst@redhat.com, philmd@redhat.com,
mark.cave-ayland@ilande.co.uk, laurent@vivier.eu,
peterx@redhat.com, f4bug@amsat.org, alistair.francis@wdc.com,
maobibo@loongson.cn, gaosong@loongson.cn, pbonzini@redhat.com,
bmeng.cn@gmail.com, alex.bennee@linaro.org,
david@gibson.dropbear.id.au
Subject: Re: [PATCH 01/31] target/loongarch: Upate the README for the softmmu.
Date: Tue, 19 Oct 2021 11:56:18 -0700 [thread overview]
Message-ID: <bdc2249e-f6d0-bbcf-b53e-0a9c81d8e378@linaro.org> (raw)
In-Reply-To: <1634628917-10031-2-git-send-email-yangxiaojuan@loongson.cn>
On 10/19/21 12:34 AM, Xiaojuan Yang wrote:
> ---
> target/loongarch/README | 134 +++++++++++++++++++++++++++++++++++++++
> target/loongarch/ramdisk | Bin 0 -> 3077952 bytes
> target/loongarch/vmlinux | Bin 0 -> 24565536 bytes
> 3 files changed, 134 insertions(+)
> create mode 100644 target/loongarch/ramdisk
> create mode 100755 target/loongarch/vmlinux
Wang Xuerui has already mentioned this, but let's make sure not to include such large test
binaries in future.
The proper place for this is in a stable url, which could then either be referenced in the
documentation. But even better than that would be an acceptance test entry -- see
tests/acceptance/boot_linux_console.py.
> + 2.Modify the kernel code for the tcg. Modifications are listed later. I will try to
> + commit to the kernel host.
This sounds like a bug in the qemu emulation of the device or boot environment.
r~
next prev parent reply other threads:[~2021-10-19 18:57 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-10-19 7:34 [PATCH 00/31] Add Loongarch softmmu support Xiaojuan Yang
2021-10-19 7:34 ` [PATCH 02/31] target/loongarch: Add CSR registers definition Xiaojuan Yang
2021-10-19 19:10 ` Richard Henderson
2021-10-19 7:34 ` [PATCH 03/31] target/loongarch: Set default csr values Xiaojuan Yang
2021-10-19 19:18 ` Richard Henderson
2021-10-19 7:34 ` [PATCH 04/31] target/loongarch: Add basic vmstate description of CPU Xiaojuan Yang
2021-10-19 19:35 ` Richard Henderson
2021-10-19 7:34 ` [PATCH 05/31] target/loongarch: Implement qmp_query_cpu_definitions() Xiaojuan Yang
2021-10-19 20:25 ` Richard Henderson
2021-10-19 7:34 ` [PATCH 08/31] target/loongarch: Add tlb instruction support Xiaojuan Yang
2021-10-20 4:19 ` Richard Henderson
2021-10-29 7:01 ` yangxiaojuan
2021-10-29 17:48 ` Richard Henderson
2021-10-19 7:34 ` [PATCH 09/31] target/loongarch: Add other core instructions support Xiaojuan Yang
2021-10-20 4:45 ` Richard Henderson
2021-10-19 7:34 ` [PATCH 10/31] target/loongarch: Add loongarch interrupt and exception handle Xiaojuan Yang
2021-10-20 4:59 ` Richard Henderson
2021-10-19 7:34 ` [PATCH 11/31] target/loongarch: Add stabletimer support Xiaojuan Yang
2021-10-19 7:34 ` [PATCH 12/31] target/loongarch: Add timer related instructions support Xiaojuan Yang
2021-10-20 5:17 ` Richard Henderson
2021-10-19 7:34 ` [PATCH 13/31] hw/pci-host: Add ls7a1000 PCIe Host bridge support for Loongson Platform Xiaojuan Yang
2021-10-19 7:35 ` [PATCH 14/31] hw/loongarch: Add a virt loongarch 3A5000 board support Xiaojuan Yang
2021-10-19 7:35 ` [PATCH 15/31] hw/loongarch: Add loongarch cpu interrupt support(CPUINTC) Xiaojuan Yang
2021-10-19 7:35 ` [PATCH 16/31] hw/loongarch: Add loongarch ipi interrupt support(IPI) Xiaojuan Yang
2021-10-19 7:35 ` [PATCH 17/31] hw/intc: Add loongarch ls7a interrupt controller support(PCH-PIC) Xiaojuan Yang
2021-10-19 7:35 ` [PATCH 18/31] hw/intc: Add loongarch ls7a msi interrupt controller support(PCH-MSI) Xiaojuan Yang
2021-10-19 7:35 ` [PATCH 19/31] hw/intc: Add loongarch extioi interrupt controller(EIOINTC) Xiaojuan Yang
2021-10-19 7:35 ` [PATCH 20/31] hw/loongarch: Add irq hierarchy for the system Xiaojuan Yang
2021-10-19 14:52 ` [PATCH 00/31] Add Loongarch softmmu support WANG Xuerui
[not found] ` <7d933f8d.228e.17c9b556e98.Coremail.yangxiaojuan@loongson.cn>
2021-10-20 5:11 ` WANG Xuerui
[not found] ` <1634628917-10031-24-git-send-email-yangxiaojuan@loongson.cn>
2021-10-19 16:19 ` [PATCH 23/31] hw/loongarch: Add default bios startup support Michael S. Tsirkin
[not found] ` <1634628917-10031-2-git-send-email-yangxiaojuan@loongson.cn>
2021-10-19 18:56 ` Richard Henderson [this message]
2021-10-22 2:25 ` [PATCH 01/31] target/loongarch: Upate the README for the softmmu yangxiaojuan
[not found] ` <1634628917-10031-7-git-send-email-yangxiaojuan@loongson.cn>
2021-10-19 21:11 ` [PATCH 06/31] target/loongarch: Add mmu support for Loongarch CPU Richard Henderson
[not found] ` <1634628917-10031-8-git-send-email-yangxiaojuan@loongson.cn>
2021-10-20 1:36 ` [PATCH 07/31] target/loongarch: Add loongarch csr/iocsr instruction support Richard Henderson
2021-10-29 6:26 ` yangxiaojuan
2021-10-29 17:38 ` Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=bdc2249e-f6d0-bbcf-b53e-0a9c81d8e378@linaro.org \
--to=richard.henderson@linaro.org \
--cc=alex.bennee@linaro.org \
--cc=alistair.francis@wdc.com \
--cc=bmeng.cn@gmail.com \
--cc=chenhuacai@loongson.cn \
--cc=david@gibson.dropbear.id.au \
--cc=f4bug@amsat.org \
--cc=gaosong@loongson.cn \
--cc=laurent@vivier.eu \
--cc=maobibo@loongson.cn \
--cc=mark.cave-ayland@ilande.co.uk \
--cc=mst@redhat.com \
--cc=pbonzini@redhat.com \
--cc=peter.maydell@linaro.org \
--cc=peterx@redhat.com \
--cc=philmd@redhat.com \
--cc=qemu-devel@nongnu.org \
--cc=thuth@redhat.com \
--cc=yangxiaojuan@loongson.cn \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).