From: Xiaoyao Li <xiaoyao.li@intel.com>
To: Zhao Liu <zhao1.liu@linux.intel.com>
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>,
"Yanan Wang" <wangyanan55@huawei.com>,
"Michael S . Tsirkin" <mst@redhat.com>,
"Richard Henderson" <richard.henderson@linaro.org>,
"Paolo Bonzini" <pbonzini@redhat.com>,
qemu-devel@nongnu.org, "Zhenyu Wang" <zhenyu.z.wang@intel.com>,
"Babu Moger" <babu.moger@amd.com>,
"Zhao Liu" <zhao1.liu@intel.com>,
"Zhuocheng Ding" <zhuocheng.ding@intel.com>
Subject: Re: [PATCH v3 03/17] softmmu: Fix CPUSTATE.nr_cores' calculation
Date: Mon, 7 Aug 2023 22:20:39 +0800 [thread overview]
Message-ID: <bddb9f52-e07c-83bb-8af8-1e726616f42a@intel.com> (raw)
In-Reply-To: <ZNDAsj0N/FoBXG/b@liuzhao-OptiPlex-7080>
On 8/7/2023 6:00 PM, Zhao Liu wrote:
> Hi Xiaoyao,
>
> On Mon, Aug 07, 2023 at 04:43:32PM +0800, Xiaoyao Li wrote:
>> Date: Mon, 7 Aug 2023 16:43:32 +0800
>> From: Xiaoyao Li <xiaoyao.li@intel.com>
>> Subject: Re: [PATCH v3 03/17] softmmu: Fix CPUSTATE.nr_cores' calculation
>>
>> On 8/7/2023 3:53 PM, Zhao Liu wrote:
>>>>> diff --git a/target/i386/cpu.c b/target/i386/cpu.c
>>>>> index 97ad229d8ba3..50613cd04612 100644
>>>>> --- a/target/i386/cpu.c
>>>>> +++ b/target/i386/cpu.c
>>>>> @@ -6011,7 +6011,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
>>>>> X86CPUTopoInfo topo_info;
>>>>> topo_info.dies_per_pkg = env->nr_dies;
>>>>> - topo_info.cores_per_die = cs->nr_cores;
>>>>> + topo_info.cores_per_die = cs->nr_cores / env->nr_dies;
>>>> This and below things make me think that, it looks ugly that @nr_dies is
>>>> added separately in struct CPUArchState for i386 because CPUState only has
>>>> @nr_cores and nr_threads. Further, for i386, it defines a specific struct
>>>> X86CPUTopoInfo to contain topology info when setting up CPUID. To me, struct
>>>> X86CPUTopoInfo is redundant as struct CpuTopology.
>>>>
>>>> maybe we can carry a struct CpuTopology in CPUState, so that we can drop
>>>> @nr_threads, @nr_cores in CPUState for all ARCHes, and @nr_dies in struct
>>>> CPUArchState for i386. As well, topo_info can be dropped here.
>>> Yeah, I agree. We think the same way, as did in [1].
>>>
>>> About X86CPUTopoInfo, it's still necessary to keep to help encode
>>> APICID.
>>
>> typedef struct X86CPUTopoInfo {
>> unsigned dies_per_pkg;
>> unsigned cores_per_die;
>> unsigned threads_per_core;
>> } X86CPUTopoInfo;
>>
>> /**
>> * CpuTopology:
>> * @cpus: the number of present logical processors on the machine
>> * @sockets: the number of sockets on the machine
>> * @dies: the number of dies in one socket
>> * @clusters: the number of clusters in one die
>> * @cores: the number of cores in one cluster
>> * @threads: the number of threads in one core
>> * @max_cpus: the maximum number of logical processors on the machine
>> */
>> typedef struct CpuTopology {
>> unsigned int cpus;
>> unsigned int sockets;
>> unsigned int dies;
>> unsigned int clusters;
>> unsigned int cores;
>> unsigned int threads;
>> unsigned int max_cpus;
>> } CpuTopology;
>>
>> I think 'struct X86CPUTopoInfo' is just a subset of 'struct CpuTopology'
>
> For smp topology, it's correct.
>
>>
>> IIUC, currently the value of X86CPUTopoInfo::dies_per_pkg should equal with
>> CpuTopology::dies, and the same for cores_per_die and threads_per_core.
>>
>> So it's OK to keep an copy of 'struct CpuTopology' in CPUState and drop
>> 'struct X86CPUTopoInfo'
>>
>>> For hybrid topology case, the APICID is likely discontinuous,
>>> and the width of each CPU level in APICID depends on the maximum number
>>> of elements in this level. So I also proposed to rename it to
>>> X86ApicidTopoInfo [2] and count the maximum number of elements in each
>>> CPU level.
>>
>> Do you mean, for example, for hybrid topology, X86CPUTopoInfo::dies_per_pkg
>> != CpuTopology::dies? Or after rename
>> X86CPUTopoInfo::max_dies != CpuTopology::dies?
>
> I mean the latter.
>
> A more typical example nowadays is thread level.
>
> X86CPUTopoInfo::max_threads may not euqal to CpuTopology::threads,
>
> since P core has 2 threads per core and E core doesn't support SMT.
>
> The CpuTopology in CPUState should reflect the topology information for
> current CPU, so CpuTopology::threads is 2 for P core and
> CpuTopology::threads = 1 for E core.
>
> But the width of the SMT level in APICID must be fixed, so that SMT width
> should be determined by X86CPUTopoInfo::max_threads. Current hybrid
> platforms implement it the same way.
I see.
Can we pull the patch into this series (define a common CPUTopoInfo in
CPUState and drop env->nr_dies, cs->nr_cores and cs->nr_threads) and let
the hybrid series later to rename it to X86ApicidTopoInfo?
> Thanks,
> Zhao
>
>>
>>> [2]:https://mail.gnu.org/archive/html/qemu-devel/2023-02/msg03237.html
>>>
>>> Thanks,
>>> Zhao
>>>
>>
next prev parent reply other threads:[~2023-08-07 14:21 UTC|newest]
Thread overview: 63+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-08-01 10:35 [PATCH v3 00/17] Support smp.clusters for x86 Zhao Liu
2023-08-01 10:35 ` [PATCH v3 01/17] i386: Fix comment style in topology.h Zhao Liu
2023-08-01 23:13 ` Moger, Babu
2023-08-04 8:12 ` Zhao Liu
2023-08-07 2:16 ` Xiaoyao Li
2023-08-07 7:05 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 02/17] tests: Rename test-x86-cpuid.c to test-x86-topo.c Zhao Liu
2023-08-01 23:20 ` Moger, Babu
2023-08-04 8:14 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 03/17] softmmu: Fix CPUSTATE.nr_cores' calculation Zhao Liu
2023-08-02 15:25 ` Moger, Babu
2023-08-04 8:16 ` Zhao Liu
2023-08-07 7:03 ` Xiaoyao Li
2023-08-07 7:53 ` Zhao Liu
2023-08-07 8:43 ` Xiaoyao Li
2023-08-07 10:00 ` Zhao Liu
2023-08-07 14:20 ` Xiaoyao Li [this message]
2023-08-07 14:42 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 04/17] i386/cpu: Fix i/d-cache topology to core level for Intel CPU Zhao Liu
2023-08-04 9:56 ` Xiaoyao Li
2023-08-04 12:43 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 05/17] i386/cpu: Use APIC ID offset to encode cache topo in CPUID[4] Zhao Liu
2023-08-02 15:41 ` Moger, Babu
2023-08-04 8:21 ` Zhao Liu
2023-08-07 8:13 ` Xiaoyao Li
2023-08-07 9:30 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 06/17] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid() Zhao Liu
2023-08-02 16:31 ` Moger, Babu
2023-08-04 8:23 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 07/17] i386: Introduce module-level cpu topology to CPUX86State Zhao Liu
2023-08-01 10:35 ` [PATCH v3 08/17] i386: Support modules_per_die in X86CPUTopoInfo Zhao Liu
2023-08-02 17:25 ` Moger, Babu
2023-08-04 9:05 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 09/17] i386: Support module_id in X86CPUTopoIDs Zhao Liu
2023-08-01 10:35 ` [PATCH v3 10/17] i386/cpu: Introduce cluster-id to X86CPU Zhao Liu
2023-08-02 22:44 ` Moger, Babu
2023-08-04 9:06 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 11/17] tests: Add test case of APIC ID for module level parsing Zhao Liu
2023-08-01 10:35 ` [PATCH v3 12/17] hw/i386/pc: Support smp.clusters for x86 PC machine Zhao Liu
2023-08-01 10:35 ` [PATCH v3 13/17] i386: Add cache topology info in CPUCacheInfo Zhao Liu
2023-08-01 10:35 ` [PATCH v3 14/17] i386: Use CPUCacheInfo.share_level to encode CPUID[4] Zhao Liu
2023-08-02 23:49 ` Moger, Babu
2023-08-03 16:41 ` Moger, Babu
2023-08-04 9:48 ` Zhao Liu
2023-08-04 15:48 ` Moger, Babu
2023-08-14 8:22 ` Zhao Liu
2023-08-14 16:03 ` Moger, Babu
2023-08-18 7:37 ` Zhao Liu
2023-08-23 17:18 ` Moger, Babu
2023-09-01 8:43 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 15/17] i386: Fix NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2023-08-03 20:40 ` Moger, Babu
2023-08-04 9:50 ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 16/17] i386: Use CPUCacheInfo.share_level to encode " Zhao Liu
2023-08-03 20:44 ` Moger, Babu
2023-08-04 9:56 ` Zhao Liu
2023-08-04 18:50 ` Moger, Babu
2023-08-01 10:35 ` [PATCH v3 17/17] i386: Add new property to control L2 cache topo in CPUID.04H Zhao Liu
2023-08-01 15:35 ` [PATCH v3 00/17] Support smp.clusters for x86 Jonathan Cameron via
2023-08-04 13:17 ` Zhao Liu
2023-08-08 11:52 ` Jonathan Cameron via
2023-08-01 23:11 ` Moger, Babu
2023-08-04 7:44 ` Zhao Liu
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