qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: liweiwei <liweiwei@iscas.ac.cn>,
	palmer@dabbelt.com, alistair.francis@wdc.com,
	bin.meng@windriver.com, qemu-riscv@nongnu.org,
	qemu-devel@nongnu.org
Cc: wangjunqiang@iscas.ac.cn, lazyparser@gmail.com, ardxwe@gmail.com
Subject: Re: [PATCH 2/6] target/riscv: add support for unique fpr read/write with support for zfinx
Date: Sat, 25 Dec 2021 14:00:29 -0800	[thread overview]
Message-ID: <be0bf212-5200-2f25-8b9e-5f7fe2941ccd@linaro.org> (raw)
In-Reply-To: <2acd9ead-d9e8-46be-b306-2aa26ced06b5@iscas.ac.cn>

On 12/24/21 7:13 PM, liweiwei wrote:
> In RV64 case, this should be nan-boxing value( upper bits are all ones).  However, zfinx 
> will not check nan-boxing of source, the upper 32 bits have no effect on the final result. 
> So I think both zero-extended or sign-extended are OK.

There is no nanboxing in zfinx at all -- values are sign-extended.


r~


  reply	other threads:[~2021-12-25 22:02 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-24  3:49 [PATCH 0/6] support subsets of Float-Point in Integer Registers extensions liweiwei
2021-12-24  3:49 ` [PATCH 1/6] target/riscv: add cfg properties for zfinx, zdinx and zhinx{min} liweiwei
2021-12-24 21:40   ` Richard Henderson
2022-01-03 22:47   ` Alistair Francis
2021-12-24  3:49 ` [PATCH 2/6] target/riscv: add support for unique fpr read/write with support for zfinx liweiwei
2021-12-24 22:00   ` Richard Henderson
2021-12-25  3:13     ` liweiwei
2021-12-25 22:00       ` Richard Henderson [this message]
2021-12-26  1:42         ` liweiwei
2021-12-26  1:54           ` liweiwei
2021-12-26  3:48           ` Richard Henderson
2021-12-24  3:49 ` [PATCH 3/6] target/riscv: add " liweiwei
2021-12-24 22:26   ` Richard Henderson
2021-12-25  3:24     ` liweiwei
2021-12-24  3:49 ` [PATCH 4/6] target/riscv: add support for zdinx liweiwei
2021-12-24 22:30   ` Richard Henderson
2021-12-25  3:27     ` liweiwei
2021-12-24  3:49 ` [PATCH 5/6] target/riscv: add support for zhinx/zhinxmin liweiwei
2021-12-24 22:32   ` Richard Henderson
2021-12-25  3:35     ` liweiwei
2021-12-24  3:49 ` [PATCH 6/6] target/riscv: expose zfinx, zdinx, zhinx{min} properties liweiwei
2021-12-24 22:32   ` Richard Henderson

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=be0bf212-5200-2f25-8b9e-5f7fe2941ccd@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=alistair.francis@wdc.com \
    --cc=ardxwe@gmail.com \
    --cc=bin.meng@windriver.com \
    --cc=lazyparser@gmail.com \
    --cc=liweiwei@iscas.ac.cn \
    --cc=palmer@dabbelt.com \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-riscv@nongnu.org \
    --cc=wangjunqiang@iscas.ac.cn \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).