From: "Philippe Mathieu-Daudé" <philmd@redhat.com>
To: Claudio Fontana <cfontana@suse.de>,
Eduardo Habkost <ehabkost@redhat.com>
Cc: peter.maydell@linaro.org,
Richard Henderson <richard.henderson@linaro.org>,
qemu-devel@nongnu.org, Paolo Bonzini <pbonzini@redhat.com>
Subject: Re: [PULL 46/46] accel: introduce AccelCPUClass extending CPUClass
Date: Mon, 26 Apr 2021 16:42:01 +0200 [thread overview]
Message-ID: <bea9d44c-7fed-57ee-a5dc-0bb5b243cef6@redhat.com> (raw)
In-Reply-To: <20210205225650.1330794-47-richard.henderson@linaro.org>
Hi Claudio,
+Eduardo/Paolo
On 2/5/21 11:56 PM, Richard Henderson wrote:
> From: Claudio Fontana <cfontana@suse.de>
>
> add a new optional interface to CPUClass, which allows accelerators
> to extend the CPUClass with additional accelerator-specific
> initializations.
>
> This will allow to separate the target cpu code that is specific
> to each accelerator, and register it automatically with object
> hierarchy lookup depending on accelerator code availability,
> as part of the accel_init_interfaces() initialization step.
>
> Signed-off-by: Claudio Fontana <cfontana@suse.de>
> Message-Id: <20210204163931.7358-19-cfontana@suse.de>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> include/hw/core/accel-cpu.h | 38 ++++++++++++++++++++++++++++++++
> include/hw/core/cpu.h | 4 ++++
> accel/accel-common.c | 44 +++++++++++++++++++++++++++++++++++++
> MAINTAINERS | 1 +
> 4 files changed, 87 insertions(+)
> create mode 100644 include/hw/core/accel-cpu.h
>
> diff --git a/include/hw/core/accel-cpu.h b/include/hw/core/accel-cpu.h
> new file mode 100644
> index 0000000000..24a6697412
> --- /dev/null
> +++ b/include/hw/core/accel-cpu.h
> @@ -0,0 +1,38 @@
> +/*
> + * Accelerator interface, specializes CPUClass
> + * This header is used only by target-specific code.
> + *
> + * Copyright 2021 SUSE LLC
> + *
> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
> + * See the COPYING file in the top-level directory.
> + */
> +
> +#ifndef ACCEL_CPU_H
> +#define ACCEL_CPU_H
> +
> +/*
> + * This header is used to define new accelerator-specific target-specific
> + * accelerator cpu subclasses.
> + * It uses CPU_RESOLVING_TYPE, so this is clearly target-specific.
> + *
> + * Do not try to use for any other purpose than the implementation of new
> + * subclasses in target/, or the accel implementation itself in accel/
> + */
> +
> +#define TYPE_ACCEL_CPU "accel-" CPU_RESOLVING_TYPE
> +#define ACCEL_CPU_NAME(name) (name "-" TYPE_ACCEL_CPU)
> +typedef struct AccelCPUClass AccelCPUClass;
> +DECLARE_CLASS_CHECKERS(AccelCPUClass, ACCEL_CPU, TYPE_ACCEL_CPU)
> +
> +typedef struct AccelCPUClass {
> + /*< private >*/
> + ObjectClass parent_class;
> + /*< public >*/
> +
> + void (*cpu_class_init)(CPUClass *cc);
> + void (*cpu_instance_init)(CPUState *cpu);
> + void (*cpu_realizefn)(CPUState *cpu, Error **errp);
We could use a const pointer to const AccelCPUOps.
> +} AccelCPUClass;
> +
> +#endif /* ACCEL_CPU_H */
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 4f6c6b18c9..38d813c389 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -79,6 +79,9 @@ struct TranslationBlock;
> /* see tcg-cpu-ops.h */
> struct TCGCPUOps;
>
> +/* see accel-cpu.h */
> +struct AccelCPUClass;
> +
> /**
> * CPUClass:
> * @class_by_name: Callback to map -cpu command line model name to an
> @@ -187,6 +190,7 @@ struct CPUClass {
> /* Keep non-pointer data at the end to minimize holes. */
> int gdb_num_core_regs;
> bool gdb_stop_before_watchpoint;
> + struct AccelCPUClass *accel_cpu;
(so here AccelCPUOps)
>
> /* when TCG is not available, this pointer is NULL */
> struct TCGCPUOps *tcg_ops;
> diff --git a/accel/accel-common.c b/accel/accel-common.c
> index 6b59873419..9901b0531c 100644
> --- a/accel/accel-common.c
> +++ b/accel/accel-common.c
> @@ -26,6 +26,9 @@
> #include "qemu/osdep.h"
> #include "qemu/accel.h"
>
> +#include "cpu.h"
> +#include "hw/core/accel-cpu.h"
> +
> #ifndef CONFIG_USER_ONLY
> #include "accel-softmmu.h"
> #endif /* !CONFIG_USER_ONLY */
> @@ -46,16 +49,57 @@ AccelClass *accel_find(const char *opt_name)
> return ac;
> }
>
> +static void accel_init_cpu_int_aux(ObjectClass *klass, void *opaque)
> +{
> + CPUClass *cc = CPU_CLASS(klass);
> + AccelCPUClass *accel_cpu = opaque;
> +
> + cc->accel_cpu = accel_cpu;
> + if (accel_cpu->cpu_class_init) {
> + accel_cpu->cpu_class_init(cc);
> + }
> +}
> +
> +/* initialize the arch-specific accel CpuClass interfaces */
> +static void accel_init_cpu_interfaces(AccelClass *ac)
> +{
> + const char *ac_name; /* AccelClass name */
> + char *acc_name; /* AccelCPUClass name */
> + ObjectClass *acc; /* AccelCPUClass */
> +
> + ac_name = object_class_get_name(OBJECT_CLASS(ac));
> + g_assert(ac_name != NULL);
> +
> + acc_name = g_strdup_printf("%s-%s", ac_name, CPU_RESOLVING_TYPE);
> + acc = object_class_by_name(acc_name);
> + g_free(acc_name);
> +
> + if (acc) {
> + object_class_foreach(accel_init_cpu_int_aux,
> + CPU_RESOLVING_TYPE, false, acc);
> + }
> +}
> +
> void accel_init_interfaces(AccelClass *ac)
> {
> #ifndef CONFIG_USER_ONLY
> accel_init_ops_interfaces(ac);
> #endif /* !CONFIG_USER_ONLY */
> +
> + accel_init_cpu_interfaces(ac);
> }
>
> +static const TypeInfo accel_cpu_type = {
> + .name = TYPE_ACCEL_CPU,
> + .parent = TYPE_OBJECT,
> + .abstract = true,
I'm not convince the abstract QOM parent has to be
per target. All methods in AccelCPUClass use pointers,
so we should be fine with opaque CPU* pointer declarations,
and have one common type for all targets.
> + .class_size = sizeof(AccelCPUClass),
> +};
> +
> static void register_accel_types(void)
> {
> type_register_static(&accel_type);
> + type_register_static(&accel_cpu_type);
> }
next prev parent reply other threads:[~2021-04-26 14:44 UTC|newest]
Thread overview: 57+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-02-05 22:56 [PULL 00/46] tcg patch queue Richard Henderson
2021-02-05 22:56 ` [PULL 01/46] tcg/s390: Fix compare instruction from extended-immediate facility Richard Henderson
2021-02-05 22:56 ` [PULL 02/46] exec/cpu-defs: Remove TCG backends dependency Richard Henderson
2021-02-05 22:56 ` [PULL 03/46] tcg/aarch64: Do not convert TCGArg to temps that are not temps Richard Henderson
2021-02-05 22:56 ` [PULL 04/46] configure: Fix --enable-tcg-interpreter Richard Henderson
2021-02-05 22:56 ` [PULL 05/46] tcg/tci: Make tci_tb_ptr thread-local Richard Henderson
2021-02-05 22:56 ` [PULL 06/46] tcg/tci: Implement INDEX_op_ld16s_i32 Richard Henderson
2021-02-05 22:56 ` [PULL 07/46] tcg/tci: Implement INDEX_op_ld8s_i64 Richard Henderson
2021-02-05 22:56 ` [PULL 08/46] tcg/tci: Inline tci_write_reg32s into the only caller Richard Henderson
2021-02-05 22:56 ` [PULL 09/46] tcg/tci: Inline tci_write_reg8 into its callers Richard Henderson
2021-02-05 22:56 ` [PULL 10/46] tcg/tci: Inline tci_write_reg16 into the only caller Richard Henderson
2021-02-05 22:56 ` [PULL 11/46] tcg/tci: Inline tci_write_reg32 into all callers Richard Henderson
2021-02-05 22:56 ` [PULL 12/46] tcg/tci: Inline tci_write_reg64 into 64-bit callers Richard Henderson
2021-02-05 22:56 ` [PULL 13/46] tcg/tci: Merge INDEX_op_ld8u_{i32,i64} Richard Henderson
2021-02-05 22:56 ` [PULL 14/46] tcg/tci: Merge INDEX_op_ld8s_{i32,i64} Richard Henderson
2021-02-05 22:56 ` [PULL 15/46] tcg/tci: Merge INDEX_op_ld16u_{i32,i64} Richard Henderson
2021-02-05 22:56 ` [PULL 16/46] tcg/tci: Merge INDEX_op_ld16s_{i32,i64} Richard Henderson
2021-02-05 22:56 ` [PULL 17/46] tcg/tci: Merge INDEX_op_{ld_i32,ld32u_i64} Richard Henderson
2021-02-05 22:56 ` [PULL 18/46] tcg/tci: Merge INDEX_op_st8_{i32,i64} Richard Henderson
2021-02-05 22:56 ` [PULL 19/46] tcg/tci: Merge INDEX_op_st16_{i32,i64} Richard Henderson
2021-02-05 22:56 ` [PULL 20/46] tcg/tci: Move stack bounds check to compile-time Richard Henderson
2021-02-05 22:56 ` [PULL 21/46] tcg/tci: Merge INDEX_op_{st_i32,st32_i64} Richard Henderson
2021-02-05 22:56 ` [PULL 22/46] tcg/tci: Use g_assert_not_reached Richard Henderson
2021-02-05 22:56 ` [PULL 23/46] tcg/tci: Remove dead code for TCG_TARGET_HAS_div2_* Richard Henderson
2021-02-05 22:56 ` [PULL 24/46] tcg/tci: Implement 64-bit division Richard Henderson
2021-02-05 22:56 ` [PULL 25/46] tcg/tci: Remove TODO as unused Richard Henderson
2021-02-05 22:56 ` [PULL 26/46] tcg/tci: Restrict TCG_TARGET_NB_REGS to 16 Richard Henderson
2021-02-05 22:56 ` [PULL 27/46] tcg/tci: Fix TCG_REG_R4 misusage Richard Henderson
2021-02-05 22:56 ` [PULL 28/46] tcg/tci: Remove TCG_CONST Richard Henderson
2021-02-05 22:56 ` [PULL 29/46] cpu: Introduce TCGCpuOperations struct Richard Henderson
2021-02-05 22:56 ` [PULL 30/46] target/riscv: remove CONFIG_TCG, as it is always TCG Richard Henderson
2021-02-05 22:56 ` [PULL 31/46] accel/tcg: split TCG-only code from cpu_exec_realizefn Richard Henderson
2021-02-05 22:56 ` [PULL 32/46] cpu: Move synchronize_from_tb() to tcg_ops Richard Henderson
2021-02-05 22:56 ` [PULL 33/46] cpu: Move cpu_exec_* " Richard Henderson
2021-02-05 22:56 ` [PULL 34/46] cpu: Move tlb_fill " Richard Henderson
2021-02-05 22:56 ` [PULL 35/46] cpu: Move debug_excp_handler " Richard Henderson
2021-02-05 22:56 ` [PULL 36/46] target/arm: do not use cc->do_interrupt for KVM directly Richard Henderson
2021-02-05 22:56 ` [PULL 37/46] cpu: move cc->do_interrupt to tcg_ops Richard Henderson
2021-02-05 22:56 ` [PULL 38/46] cpu: move cc->transaction_failed " Richard Henderson
2021-02-23 21:43 ` Philippe Mathieu-Daudé
2021-02-24 8:46 ` Claudio Fontana
2021-02-05 22:56 ` [PULL 39/46] cpu: move do_unaligned_access " Richard Henderson
2021-02-05 22:56 ` [PULL 40/46] physmem: make watchpoint checking code TCG-only Richard Henderson
2021-02-05 22:56 ` [PULL 41/46] cpu: move adjust_watchpoint_address to tcg_ops Richard Henderson
2021-02-05 22:56 ` [PULL 42/46] cpu: move debug_check_watchpoint " Richard Henderson
2021-02-05 22:56 ` [PULL 43/46] cpu: tcg_ops: move to tcg-cpu-ops.h, keep a pointer in CPUClass Richard Henderson
2021-02-05 22:56 ` [PULL 44/46] accel: extend AccelState and AccelClass to user-mode Richard Henderson
2021-02-05 22:56 ` [PULL 45/46] accel: replace struct CpusAccel with AccelOpsClass Richard Henderson
2021-02-05 22:56 ` [PULL 46/46] accel: introduce AccelCPUClass extending CPUClass Richard Henderson
2021-04-26 14:42 ` Philippe Mathieu-Daudé [this message]
2021-02-06 14:28 ` [PULL 00/46] tcg patch queue Peter Maydell
2021-02-06 19:14 ` Philippe Mathieu-Daudé
2021-02-06 19:38 ` Increased execution time with TCI in latest git master (was: Re: [PULL 00/46] tcg patch queue) Stefan Weil
2021-02-07 3:45 ` Richard Henderson
2021-02-07 10:50 ` Stefan Weil
2021-02-07 18:37 ` Richard Henderson
2021-02-07 22:00 ` Stefan Weil
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