From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
Bin Meng <bin.meng@windriver.com>,
Palmer Dabbelt <palmer@dabbelt.com>, Bin Meng <bmeng@tinylab.org>
Subject: Re: [PATCH v3 07/10] hw/riscv/boot.c: use MachineState in riscv_load_initrd()
Date: Wed, 28 Dec 2022 16:51:35 +0100 [thread overview]
Message-ID: <bebabfa6-483c-a604-fe8d-9d0585f505db@linaro.org> (raw)
In-Reply-To: <20221228133336.197467-8-dbarboza@ventanamicro.com>
On 28/12/22 14:33, Daniel Henrique Barboza wrote:
> 'filename', 'mem_size' and 'fdt' from riscv_load_initrd() can all be
> retrieved by the MachineState object for all callers.
>
> Cc: Palmer Dabbelt <palmer@dabbelt.com>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> Reviewed-by: Bin Meng <bmeng@tinylab.org>
> ---
> hw/riscv/boot.c | 6 ++++--
> hw/riscv/microchip_pfsoc.c | 3 +--
> hw/riscv/sifive_u.c | 3 +--
> hw/riscv/spike.c | 3 +--
> hw/riscv/virt.c | 3 +--
> include/hw/riscv/boot.h | 3 +--
> 6 files changed, 9 insertions(+), 12 deletions(-)
>
> diff --git a/hw/riscv/boot.c b/hw/riscv/boot.c
> index d3c71b3f0b..f7e806143a 100644
> --- a/hw/riscv/boot.c
> +++ b/hw/riscv/boot.c
> @@ -204,9 +204,11 @@ target_ulong riscv_load_kernel(const char *kernel_filename,
> exit(1);
> }
>
> -void riscv_load_initrd(const char *filename, uint64_t mem_size,
> - uint64_t kernel_entry, void *fdt)
> +void riscv_load_initrd(MachineState *machine, uint64_t kernel_entry)
> {
> + const char *filename = machine->initrd_filename;
Do we want to check for missing -initrd here? Or simply return quietly
if not provided?
> + uint64_t mem_size = machine->ram_size;
> + void *fdt = machine->fdt;
> hwaddr start, end;
> ssize_t size;
next prev parent reply other threads:[~2022-12-28 15:52 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-28 13:33 [PATCH v3 00/10] irscv: OpenSBI boot test and cleanups Daniel Henrique Barboza
2022-12-28 13:33 ` [PATCH v3 01/10] tests/avocado: add RISC-V opensbi boot test Daniel Henrique Barboza
2022-12-28 15:18 ` Bin Meng
2022-12-28 20:21 ` Daniel Henrique Barboza
2022-12-29 11:18 ` Bin Meng
2022-12-28 13:33 ` [PATCH v3 02/10] hw/riscv/spike: use 'fdt' from MachineState Daniel Henrique Barboza
2022-12-28 13:33 ` [PATCH v3 03/10] hw/riscv/sifive_u: " Daniel Henrique Barboza
2022-12-28 13:33 ` [PATCH v3 04/10] hw/riscv/spike.c: load initrd right after riscv_load_kernel() Daniel Henrique Barboza
2022-12-28 13:33 ` [PATCH v3 05/10] hw/riscv: write initrd 'chosen' FDT inside riscv_load_initrd() Daniel Henrique Barboza
2022-12-28 13:33 ` [PATCH v3 06/10] hw/riscv: write bootargs 'chosen' FDT after riscv_load_kernel() Daniel Henrique Barboza
2022-12-28 13:33 ` [PATCH v3 07/10] hw/riscv/boot.c: use MachineState in riscv_load_initrd() Daniel Henrique Barboza
2022-12-28 15:51 ` Philippe Mathieu-Daudé [this message]
2022-12-28 19:04 ` Daniel Henrique Barboza
2022-12-29 14:17 ` Alex Bennée
2022-12-28 13:33 ` [PATCH v3 08/10] hw/riscv/boot.c: use MachineState in riscv_load_kernel() Daniel Henrique Barboza
2022-12-28 13:33 ` [PATCH v3 09/10] hw/riscv/boot.c: introduce riscv_load_kernel_and_initrd() Daniel Henrique Barboza
2022-12-28 15:52 ` Philippe Mathieu-Daudé
2022-12-28 13:33 ` [PATCH v3 10/10] hw/riscv/boot.c: make riscv_load_initrd() static Daniel Henrique Barboza
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