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Fri, 13 Dec 2024 04:03:20 -0800 (PST) X-Google-Smtp-Source: AGHT+IEPeQTG73Oowow/xBL4E5kAu8dztvAtCYs7JbabkmqxbnT6/jxPvpenj2ubISDKsFMHeUpRpw== X-Received: by 2002:a17:903:1212:b0:216:4b1f:499 with SMTP id d9443c01a7336-21892a5d74bmr34747595ad.31.1734091399704; Fri, 13 Dec 2024 04:03:19 -0800 (PST) Received: from [10.72.112.56] ([43.228.180.230]) by smtp.gmail.com with ESMTPSA id 98e67ed59e1d1-2f142d90d07sm2998345a91.3.2024.12.13.04.03.12 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 13 Dec 2024 04:03:15 -0800 (PST) Message-ID: Date: Fri, 13 Dec 2024 22:03:08 +1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v3 17/26] hw/arm/virt: Reserve one bit of guest-physical address for RME To: Jean-Philippe Brucker , peter.maydell@linaro.org Cc: richard.henderson@linaro.org, philmd@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, alex.bennee@linaro.org References: <20241125195626.856992-2-jean-philippe@linaro.org> <20241125195626.856992-19-jean-philippe@linaro.org> Content-Language: en-US From: Gavin Shan In-Reply-To: <20241125195626.856992-19-jean-philippe@linaro.org> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=gshan@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.495, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-0.001, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Hi Jean, On 11/26/24 5:56 AM, Jean-Philippe Brucker wrote: > When RME is enabled, the upper GPA bit is used to distinguish protected > from unprotected addresses. Reserve it when setting up the guest memory > map. > > Signed-off-by: Jean-Philippe Brucker > --- > hw/arm/virt.c | 14 ++++++++++++-- > 1 file changed, 12 insertions(+), 2 deletions(-) > > diff --git a/hw/arm/virt.c b/hw/arm/virt.c > index 9836dfbdfb..eb94997914 100644 > --- a/hw/arm/virt.c > +++ b/hw/arm/virt.c > @@ -3035,14 +3035,24 @@ static int virt_kvm_type(MachineState *ms, const char *type_str) > VirtMachineState *vms = VIRT_MACHINE(ms); > int rme_vm_type = kvm_arm_rme_vm_type(ms); > int max_vm_pa_size, requested_pa_size; > + int rme_reserve_bit = 0; > bool fixed_ipa; > > - max_vm_pa_size = kvm_arm_get_max_vm_ipa_size(ms, &fixed_ipa); > + if (rme_vm_type) { > + /* > + * With RME, the upper GPA bit differentiates Realm from NS memory. > + * Reserve the upper bit to ensure that highmem devices will fit. > + */ > + rme_reserve_bit = 1; > + } > + > + max_vm_pa_size = kvm_arm_get_max_vm_ipa_size(ms, &fixed_ipa) - > + rme_reserve_bit; > For realm, @max_vm_pa_size is decreased by 1 ... > /* we freeze the memory map to compute the highest gpa */ > virt_set_memmap(vms, max_vm_pa_size); > > - requested_pa_size = 64 - clz64(vms->highest_gpa); > + requested_pa_size = 64 - clz64(vms->highest_gpa) + rme_reserve_bit; > ... For realm, @requested_pa_size is increased by 1, meaning there are two bits in the gap. > /* > * KVM requires the IPA size to be at least 32 bits. One bit instead of two bits seems the correct gap for the followup check? if (requested_pa_size > max_vm_pa_size) { error_report("-m and ,maxmem option values " "require an IPA range (%d bits) larger than " "the one supported by the host (%d bits)", requested_pa_size, max_vm_pa_size); return -1; } Thanks, Gavin