Re: [RFC v4 2/2] target/riscv: rvv: improve performance of RISC-V vector loads and stores on large amounts of data.

[Richard Henderson <richard.henderson@linaro.org>]

On 11/11/24 08:04, Paolo Savini wrote:
> Hi Richard, Daniel,
> 
> This might be a silly question, but why do we need to ensure atomicity when emulating 
> these guest instructions? I might be wrong but I didn't see an explicit requirement for 
> the vector instructions to be atomic in the documentation of the RISC-V V extension.

So that it works with threads?

The rvv extension talks about loads and stores to individual elements.  The risc-v integer 
spec talks about the atomicity of loads and stores.  The rvv extension does not talk about 
*lowering* atomicity requirements.


> Anyway the patches from Max have landed and since one of them already uses memcpy() where 
> this patch does and achieves a similar performance improvement we should probably drop 
> this particular patch. I'm wondering whether we should be concerned about atomicity there 
> too?
> 
> https://github.com/qemu/qemu/blob/134b443512825bed401b6e141447b8cdc22d2efe/target/riscv/ 
> vector_helper.c#L224

It *did* go through review for exactly this. You'll notice that the memcpy path is 
restricted to esz == 1, i.e. bytes.


r~