qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: CLEMENT MATHIEU--DRIF <clement.mathieu--drif@eviden.com>
To: Zhenzhong Duan <zhenzhong.duan@intel.com>,
	"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>
Cc: "alex.williamson@redhat.com" <alex.williamson@redhat.com>,
	"clg@redhat.com" <clg@redhat.com>,
	"eric.auger@redhat.com" <eric.auger@redhat.com>,
	"mst@redhat.com" <mst@redhat.com>,
	"jasowang@redhat.com" <jasowang@redhat.com>,
	"yi.l.liu@intel.com" <yi.l.liu@intel.com>
Subject: Re: [PATCH v2 3/3] pci: Fix wrong parameter passing to pci_device_get_iommu_bus_devfn()
Date: Wed, 1 Oct 2025 06:45:10 +0000	[thread overview]
Message-ID: <bee8c8fa1be343a09040cc876067756fcfc9f47e.camel@eviden.com> (raw)
In-Reply-To: <20250929034206.439266-4-zhenzhong.duan@intel.com>

Hi Zhenzhong

Uh, good catch O.o

Reviewed-by: Clément Mathieu--Drif <clement.mathieu--drif@eviden.com>

On Sun, 2025-09-28 at 23:42 -0400, Zhenzhong Duan wrote:
> The 2nd parameter of pci_device_get_iommu_bus_devfn() about root PCIBus  
> backed by an IOMMU for the PCI device, the 3rd is about aliased PCIBus  
> of the PCI device.
> 
> Meanwhile the 3rd and 4th parameters are optional, pass NULL if they  
> are not needed.
> 
> Signed-off-by: Zhenzhong Duan <[zhenzhong.duan@intel.com](mailto:zhenzhong.duan@intel.com)>  
> ---  
>  hw/pci/pci.c | 18 ++++++++----------  
>  1 file changed, 8 insertions(+), 10 deletions(-)
> 
> diff --git a/hw/pci/pci.c b/hw/pci/pci.c  
> index c3df9d6656..d5ed89aab7 100644  
> --- a/hw/pci/pci.c  
> +++ b/hw/pci/pci.c  
> @@ -2967,7 +2967,7 @@ int pci_iommu_init_iotlb_notifier(PCIDevice *dev, IOMMUNotifier *n,  
>      PCIBus *iommu_bus;  
>      int devfn;  
>    
> -    pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn);  
> +    pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn);  
>      if (iommu_bus && iommu_bus->iommu_ops->init_iotlb_notifier) {  
>          iommu_bus->iommu_ops->init_iotlb_notifier(bus, iommu_bus->iommu_opaque,  
>                                                    devfn, n, fn, opaque);  
> @@ -3025,7 +3025,7 @@ int pci_pri_request_page(PCIDevice *dev, uint32_t pasid, bool priv_req,  
>          return -EPERM;  
>      }  
>    
> -    pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn);  
> +    pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn);  
>      if (iommu_bus && iommu_bus->iommu_ops->pri_request_page) {  
>          return iommu_bus->iommu_ops->pri_request_page(bus,  
>                                                       iommu_bus->iommu_opaque,  
> @@ -3049,7 +3049,7 @@ int pci_pri_register_notifier(PCIDevice *dev, uint32_t pasid,  
>          return -EPERM;  
>      }  
>    
> -    pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn);  
> +    pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn);  
>      if (iommu_bus && iommu_bus->iommu_ops->pri_register_notifier) {  
>          iommu_bus->iommu_ops->pri_register_notifier(bus,  
>                                                      iommu_bus->iommu_opaque,  
> @@ -3066,7 +3066,7 @@ void pci_pri_unregister_notifier(PCIDevice *dev, uint32_t pasid)  
>      PCIBus *iommu_bus;  
>      int devfn;  
>    
> -    pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn);  
> +    pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn);  
>      if (iommu_bus && iommu_bus->iommu_ops->pri_unregister_notifier) {  
>          iommu_bus->iommu_ops->pri_unregister_notifier(bus,  
>                                                        iommu_bus->iommu_opaque,  
> @@ -3098,7 +3098,7 @@ ssize_t pci_ats_request_translation(PCIDevice *dev, uint32_t pasid,  
>          return -EPERM;  
>      }  
>    
> -    pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn);  
> +    pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn);  
>      if (iommu_bus && iommu_bus->iommu_ops->ats_request_translation) {  
>          return iommu_bus->iommu_ops->ats_request_translation(bus,  
>                                                       iommu_bus->iommu_opaque,  
> @@ -3122,7 +3122,7 @@ int pci_iommu_register_iotlb_notifier(PCIDevice *dev, uint32_t pasid,  
>          return -EPERM;  
>      }  
>    
> -    pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn);  
> +    pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn);  
>      if (iommu_bus && iommu_bus->iommu_ops->register_iotlb_notifier) {  
>          iommu_bus->iommu_ops->register_iotlb_notifier(bus,  
>                                             iommu_bus->iommu_opaque, devfn,  
> @@ -3144,7 +3144,7 @@ int pci_iommu_unregister_iotlb_notifier(PCIDevice *dev, uint32_t pasid,  
>          return -EPERM;  
>      }  
>    
> -    pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn);  
> +    pci_device_get_iommu_bus_devfn(dev, &iommu_bus, &bus, &devfn);  
>      if (iommu_bus && iommu_bus->iommu_ops->unregister_iotlb_notifier) {  
>          iommu_bus->iommu_ops->unregister_iotlb_notifier(bus,  
>                                                          iommu_bus->iommu_opaque,  
> @@ -3158,11 +3158,9 @@ int pci_iommu_unregister_iotlb_notifier(PCIDevice *dev, uint32_t pasid,  
>  int pci_iommu_get_iotlb_info(PCIDevice *dev, uint8_t *addr_width,  
>                               uint32_t *min_page_size)  
>  {  
> -    PCIBus *bus;  
>      PCIBus *iommu_bus;  
> -    int devfn;  
>    
> -    pci_device_get_iommu_bus_devfn(dev, &bus, &iommu_bus, &devfn);  
> +    pci_device_get_iommu_bus_devfn(dev, &iommu_bus, NULL, NULL);  
>      if (iommu_bus && iommu_bus->iommu_ops->get_iotlb_info) {  
>          iommu_bus->iommu_ops->get_iotlb_info(iommu_bus->iommu_opaque,  
>                                               addr_width, min_page_size);

  reply	other threads:[~2025-10-01  6:47 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-09-29  3:42 [PATCH v2 0/3] Enable ESRTPS and simplify caching-mode=on check Zhenzhong Duan
2025-09-29  3:42 ` [PATCH v2 1/3] intel_iommu: Enable Enhanced Set Root Table Pointer Support (ESRTPS) Zhenzhong Duan
2025-09-29  3:42 ` [PATCH v2 2/3] intel_iommu: Simplify caching mode check with VFIO device Zhenzhong Duan
2025-10-01  6:44   ` CLEMENT MATHIEU--DRIF
2025-10-08 10:20     ` Duan, Zhenzhong
2025-09-29  3:42 ` [PATCH v2 3/3] pci: Fix wrong parameter passing to pci_device_get_iommu_bus_devfn() Zhenzhong Duan
2025-10-01  6:45   ` CLEMENT MATHIEU--DRIF [this message]
2025-10-01  7:22   ` Cédric Le Goater
2025-10-08 10:15     ` Duan, Zhenzhong
2025-10-08 11:02       ` CLEMENT MATHIEU--DRIF

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=bee8c8fa1be343a09040cc876067756fcfc9f47e.camel@eviden.com \
    --to=clement.mathieu--drif@eviden.com \
    --cc=alex.williamson@redhat.com \
    --cc=clg@redhat.com \
    --cc=eric.auger@redhat.com \
    --cc=jasowang@redhat.com \
    --cc=mst@redhat.com \
    --cc=qemu-devel@nongnu.org \
    --cc=yi.l.liu@intel.com \
    --cc=zhenzhong.duan@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).