From: Miles Glenn <milesg@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org
Cc: fbarrat@linux.ibm.com, npiggin@gmail.com, clg@kaod.org,
calebs@us.ibm.com, chalapathi.v@ibm.com,
chalapathi.v@linux.ibm.com, saif.abrar@linux.vnet.ibm.com,
dantan@us.ibm.com
Subject: Re: [PATCH v3 5/5] tests/qtest: Add pnv-spi-seeprom qtest
Date: Fri, 17 May 2024 11:46:10 -0500 [thread overview]
Message-ID: <bf5641abc75b53403f54ddf05008ad2ae50229c5.camel@linux.ibm.com> (raw)
In-Reply-To: <20240516163304.25191-6-chalapathi.v@linux.ibm.com>
Hi Chalapathi,
Looks good. I think I would just shorten the names of the xscom
read/write functions to make things more readable inside the
transaction function.
-Glenn
Reviewed-by: Glenn Miles <milesg@linux.ibm.com>
> +static uint64_t pnv_spi_seeprom_xscom_addr(uint32_t reg)
> +{
> + return pnv_xscom_addr(SPIC2_XSCOM_BASE + reg);
> +}
> +
> +static void pnv_spi_controller_xscom_write(QTestState *qts, uint32_t
> reg,
> + uint64_t val)
> +{
> + qtest_writeq(qts, pnv_spi_seeprom_xscom_addr(reg), val);
> +}
> +
> +static uint64_t pnv_spi_controller_xscom_read(QTestState *qts,
> uint32_t reg)
> +{
> + return qtest_readq(qts, pnv_spi_seeprom_xscom_addr(reg));
> +}
> +
> +static void spi_seeprom_transaction(QTestState *qts)
> +{
> + /* SPI transactions to SEEPROM to read from SEEPROM image */
> + pnv_spi_controller_xscom_write(qts, COUNTER_CONFIG_REG,
> + READ_OP_COUNTER_CONFIG);
> + pnv_spi_controller_xscom_write(qts, SEQUENCER_OPERATION_REG,
> + READ_OP_SEQUENCER);
> + pnv_spi_controller_xscom_write(qts, TRANSMIT_DATA_REG,
> READ_OP_TDR_DATA);
> + pnv_spi_controller_xscom_write(qts, TRANSMIT_DATA_REG, 0);
> + /* Read 5*8 bytes from SEEPROM at 0x100 */
> + uint64_t rdr_val = pnv_spi_controller_xscom_read(qts,
> RECEIVE_DATA_REG);
> + printf("RDR READ = 0x%lx\n", rdr_val);
> + rdr_val = pnv_spi_controller_xscom_read(qts, RECEIVE_DATA_REG);
> + rdr_val = pnv_spi_controller_xscom_read(qts, RECEIVE_DATA_REG);
> + rdr_val = pnv_spi_controller_xscom_read(qts, RECEIVE_DATA_REG);
> + rdr_val = pnv_spi_controller_xscom_read(qts, RECEIVE_DATA_REG);
> + printf("RDR READ = 0x%lx\n", rdr_val);
> +
> + /* SPI transactions to SEEPROM to write to SEEPROM image */
> + pnv_spi_controller_xscom_write(qts, COUNTER_CONFIG_REG,
> + WRITE_OP_COUNTER_CONFIG);
> + /* Set Write Enable Latch bit of status0 register */
> + pnv_spi_controller_xscom_write(qts, SEQUENCER_OPERATION_REG,
> + WRITE_OP_SEQUENCER);
> + pnv_spi_controller_xscom_write(qts, TRANSMIT_DATA_REG,
> WRITE_OP_WREN);
> + /* write 8 bytes to SEEPROM at 0x100 */
> + pnv_spi_controller_xscom_write(qts, SEQUENCER_OPERATION_REG,
> + WRITE_OP_SEQUENCER);
> + pnv_spi_controller_xscom_write(qts, TRANSMIT_DATA_REG,
> WRITE_OP_TDR_DATA);
> +}
> +
> +/* Find complete path of in_file in the current working directory */
> +static void find_file(const char *in_file, char *in_path)
> +{
> + g_autofree char *cwd = g_get_current_dir();
> + char *filepath = g_build_filename(cwd, in_file, NULL);
> + if (!access(filepath, F_OK)) {
> + strcpy(in_path, filepath);
> + } else {
> + strcpy(in_path, "");
> + printf("File %s not found within %s\n", in_file, cwd);
> + }
> +}
> +
> +static void test_spi_seeprom(void)
> +{
> + QTestState *qts = NULL;
> + char seepromfile[500];
> + find_file("sbe_measurement_seeprom.bin.ecc", seepromfile);
> + if (strcmp(seepromfile, "")) {
> + printf("Starting QEMU with seeprom file.\n");
> + qts = qtest_initf("-m 2G -machine powernv10 -smp 2,cores=2,"
> + "threads=1 -accel tcg,thread=single
> -nographic "
> + "-blockdev node-
> name=pib_spic2,driver=file,"
> + "filename=sbe_measurement_seeprom.bin.ecc "
> + "-device 25csm04,bus=pnv-spi-bus.2,cs=0,"
> + "drive=pib_spic2");
> + } else {
> + printf("Starting QEMU without seeprom file.\n");
> + qts = qtest_initf("-m 2G -machine powernv10 -smp 2,cores=2,"
> + "threads=1 -accel tcg,thread=single
> -nographic"
> + " -device 25csm04,bus=pnv-spi-bus.2,cs=0");
> + }
> + spi_seeprom_transaction(qts);
> + qtest_quit(qts);
> +}
> +
> +int main(int argc, char **argv)
> +{
> + g_test_init(&argc, &argv, NULL);
> + qtest_add_func("spi_seeprom", test_spi_seeprom);
> + return g_test_run();
> +}
> diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
> index 86293051dc..2fa98b2430 100644
> --- a/tests/qtest/meson.build
> +++ b/tests/qtest/meson.build
> @@ -171,6 +171,7 @@ qtests_ppc64 = \
> qtests_ppc + \
> (config_all_devices.has_key('CONFIG_PSERIES') ? ['device-plug-
> test'] : []) + \
> (config_all_devices.has_key('CONFIG_POWERNV') ? ['pnv-xscom-test']
> : []) + \
> + (config_all_devices.has_key('CONFIG_POWERNV') ? ['pnv-spi-seeprom-
> test'] : []) + \
> (config_all_devices.has_key('CONFIG_POWERNV') ? ['pnv-host-i2c-
> test'] : []) + \
> (config_all_devices.has_key('CONFIG_PSERIES') ? ['rtas-test'] :
> []) + \
> (slirp.found() ? ['pxe-test'] : []) + \
next prev parent reply other threads:[~2024-05-17 16:51 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <20240516163304.25191-1-chalapathi.v@linux.ibm.com>
[not found] ` <20240516163304.25191-2-chalapathi.v@linux.ibm.com>
2024-05-17 16:27 ` [PATCH v3 1/5] ppc/pnv: Add SPI controller model Miles Glenn
2024-05-21 6:09 ` Chalapathi V
[not found] ` <20240516163304.25191-6-chalapathi.v@linux.ibm.com>
2024-05-17 16:46 ` Miles Glenn [this message]
[not found] ` <20240516163304.25191-4-chalapathi.v@linux.ibm.com>
2024-05-17 17:33 ` [PATCH v3 3/5] hw/block: Add Microchip's 25CSM04 to m25p80 Miles Glenn
[not found] ` <20240516163304.25191-5-chalapathi.v@linux.ibm.com>
2024-05-17 19:26 ` [PATCH v3 4/5] hw/ppc: SPI controller wiring to P10 chip Miles Glenn
[not found] ` <20240516163304.25191-3-chalapathi.v@linux.ibm.com>
2024-05-17 19:54 ` [PATCH v3 2/5] ppc/pnv: Extend SPI model Miles Glenn
2024-05-21 6:11 ` Chalapathi V
2024-05-21 6:18 ` Cédric Le Goater
2024-05-21 14:21 ` Miles Glenn
2024-05-15 17:41 [PATCH v3 0/5] hw/ppc: " Chalapathi V
2024-05-15 17:41 ` [PATCH v3 5/5] tests/qtest: Add pnv-spi-seeprom qtest Chalapathi V
2024-05-20 6:13 ` Cédric Le Goater
2024-05-21 6:38 ` Chalapathi V
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