From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Song Gao <gaosong@loongson.cn>, qemu-devel@nongnu.org
Cc: richard.henderson@linaro.org, peter.maydell@linaro.org,
alex.bennee@linaro.org, maobibo@loongson.cn,
zhaotianrui@loongson.cn
Subject: Re: [PATCH 1/1] target/loongarch: move translate modules to tcg/
Date: Fri, 29 Dec 2023 11:08:04 +0100 [thread overview]
Message-ID: <bf627980-1edd-4743-889c-c27bbae971aa@linaro.org> (raw)
In-Reply-To: <20231229092435.3416025-1-gaosong@loongson.cn>
Hi,
On 29/12/23 10:24, Song Gao wrote:
> Introduce the target/loongarch/tcg directory. Its purpose is to hold the TCG
> code that is selected by CONFIG_TCG
>
> Signed-off-by: Song Gao <gaosong@loongson.cn>
> ---
> target/loongarch/{ => tcg}/constant_timer.c | 0
> target/loongarch/{ => tcg}/csr_helper.c | 0
> target/loongarch/{ => tcg}/fpu_helper.c | 0
> target/loongarch/{ => tcg}/iocsr_helper.c | 0
> target/loongarch/{ => tcg}/op_helper.c | 0
> target/loongarch/{ => tcg}/tlb_helper.c | 0
> target/loongarch/{ => tcg}/translate.c | 0
> target/loongarch/{ => tcg}/vec_helper.c | 0
> .../{ => tcg}/insn_trans/trans_arith.c.inc | 0
> .../{ => tcg}/insn_trans/trans_atomic.c.inc | 0
> .../{ => tcg}/insn_trans/trans_bit.c.inc | 0
> .../{ => tcg}/insn_trans/trans_branch.c.inc | 0
> .../{ => tcg}/insn_trans/trans_extra.c.inc | 0
> .../{ => tcg}/insn_trans/trans_farith.c.inc | 0
> .../{ => tcg}/insn_trans/trans_fcmp.c.inc | 0
> .../{ => tcg}/insn_trans/trans_fcnv.c.inc | 0
> .../{ => tcg}/insn_trans/trans_fmemory.c.inc | 0
> .../{ => tcg}/insn_trans/trans_fmov.c.inc | 0
> .../{ => tcg}/insn_trans/trans_memory.c.inc | 0
> .../{ => tcg}/insn_trans/trans_privileged.c.inc | 0
> .../{ => tcg}/insn_trans/trans_shift.c.inc | 0
> .../{ => tcg}/insn_trans/trans_vec.c.inc | 0
> target/loongarch/meson.build | 17 ++---------------
> target/loongarch/tcg/meson.build | 15 +++++++++++++++
> 24 files changed, 17 insertions(+), 15 deletions(-)
> rename target/loongarch/{ => tcg}/constant_timer.c (100%)
> rename target/loongarch/{ => tcg}/csr_helper.c (100%)
> rename target/loongarch/{ => tcg}/fpu_helper.c (100%)
> rename target/loongarch/{ => tcg}/iocsr_helper.c (100%)
> rename target/loongarch/{ => tcg}/op_helper.c (100%)
> rename target/loongarch/{ => tcg}/tlb_helper.c (100%)
> rename target/loongarch/{ => tcg}/translate.c (100%)
> rename target/loongarch/{ => tcg}/vec_helper.c (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_arith.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_atomic.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_bit.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_branch.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_extra.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_farith.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_fcmp.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_fcnv.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_fmemory.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_fmov.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_memory.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_privileged.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_shift.c.inc (100%)
> rename target/loongarch/{ => tcg}/insn_trans/trans_vec.c.inc (100%)
> create mode 100644 target/loongarch/tcg/meson.build
> diff --git a/target/loongarch/meson.build b/target/loongarch/meson.build
> index 18e8191e2b..a004523439 100644
> --- a/target/loongarch/meson.build
> +++ b/target/loongarch/meson.build
> @@ -3,31 +3,18 @@ gen = decodetree.process('insns.decode')
> loongarch_ss = ss.source_set()
> loongarch_ss.add(files(
> 'cpu.c',
> + 'gdbstub.c'
Preferably a preliminary commit "gdbstub.c is not specific to TCG and
can be used by other accelerators ...". Otherwise just mention it in
this patch description.
> ))
> -loongarch_tcg_ss = ss.source_set()
> -loongarch_tcg_ss.add(gen)
> -loongarch_tcg_ss.add(files(
> - 'fpu_helper.c',
> - 'op_helper.c',
> - 'translate.c',
> - 'gdbstub.c',
> - 'vec_helper.c',
> -))
> -loongarch_tcg_ss.add(zlib)
>
> loongarch_system_ss = ss.source_set()
> loongarch_system_ss.add(files(
> 'loongarch-qmp-cmds.c',
> 'machine.c',
> - 'tlb_helper.c',
> - 'constant_timer.c',
> - 'csr_helper.c',
> - 'iocsr_helper.c',
> ))
>
> common_ss.add(when: 'CONFIG_LOONGARCH_DIS', if_true: [files('disas.c'), gen])
>
> -loongarch_ss.add_all(when: 'CONFIG_TCG', if_true: [loongarch_tcg_ss])
> +subdir('tcg')
>
> target_arch += {'loongarch': loongarch_ss}
> target_system_arch += {'loongarch': loongarch_system_ss}
> diff --git a/target/loongarch/tcg/meson.build b/target/loongarch/tcg/meson.build
> new file mode 100644
> index 0000000000..bb7411e5e5
> --- /dev/null
> +++ b/target/loongarch/tcg/meson.build
> @@ -0,0 +1,15 @@
You missed the CONFIG_TCG check, you can use either:
if 'CONFIG_TCG' in config_all
subdir('tcg')
endif
in target/loongarch/meson.build, but since your target seems well
designed and doesn't require TCG stub, you can do directly here:
if 'CONFIG_TCG' not in config_all
subdir_done()
endif
so the rest of this file isn't processed.
> +loongarch_ss.add([zlib, gen])
> +
> +loongarch_ss.add(files(
> + 'fpu_helper.c',
> + 'op_helper.c',
> + 'vec_helper.c',
> + 'translate.c',
(since moved/new, let's sort these files alphabetically).
> +))
> +
> +loongarch_system_ss.add(files(
> + 'constant_timer.c',
> + 'iocsr_helper.c',
> + 'tlb_helper.c',
> + 'csr_helper.c',
(Ditto)
> +))
next prev parent reply other threads:[~2023-12-29 10:08 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-29 9:24 [PATCH 1/1] target/loongarch: move translate modules to tcg/ Song Gao
2023-12-29 10:08 ` Philippe Mathieu-Daudé [this message]
2024-01-02 1:25 ` gaosong
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