[PULL 0/2] loongarch-to-apply queue

[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit a3cb6d5004ff638aefe686ecd540718a793bd1b1:

  Merge tag 'pull-tcg-20230525' of https://gitlab.com/rth7680/qemu into staging (2023-05-25 11:11:52 -0700)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230526

for you to fetch changes up to 65bfaaae6ac79ebc623acc0ce28cc3bd4fe8b5e5:

  target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump (2023-05-26 17:21:16 +0800)

----------------------------------------------------------------
pull-loongarch-20230526

----------------------------------------------------------------
Song Gao (2):
      target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV
      target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump

 target/loongarch/cpu.c                      |  2 +-
 target/loongarch/insn_trans/trans_lsx.c.inc | 39 +++++++++++++++++++----------
 target/loongarch/op_helper.c                |  6 +++--
 3 files changed, 31 insertions(+), 16 deletions(-)

[PULL 1/2] target/loongarch: Fix LD/ST{LE/GT} instructions get wrong CSR_ERA and CSR_BADV

[Song Gao]

1.helper_asrtle_d/helper_asrtgt_d need use GETPC() to get PC;
2 LD/ST{LE/GT} need set CSR_BADV = gpr[rj];
3 ASRTLE.D/ASRTGT.D also write CSR_BADV, but this value is random
  and has no reference value.

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230515130042.2719712-1-gaosong@loongson.cn>
---
 target/loongarch/cpu.c       | 2 +-
 target/loongarch/op_helper.c | 6 ++++--
 2 files changed, 5 insertions(+), 3 deletions(-)

diff --git a/target/loongarch/cpu.c b/target/loongarch/cpu.c
index c0afc21b2f..ad93ecac92 100644
--- a/target/loongarch/cpu.c
+++ b/target/loongarch/cpu.c
@@ -187,10 +187,10 @@ static void loongarch_cpu_do_interrupt(CPUState *cs)
     case EXCCODE_IPE:
     case EXCCODE_FPD:
     case EXCCODE_FPE:
-    case EXCCODE_BCE:
     case EXCCODE_SXD:
         env->CSR_BADV = env->pc;
         QEMU_FALLTHROUGH;
+    case EXCCODE_BCE:
     case EXCCODE_ADEM:
     case EXCCODE_PIL:
     case EXCCODE_PIS:
diff --git a/target/loongarch/op_helper.c b/target/loongarch/op_helper.c
index 568c071601..60335a05e2 100644
--- a/target/loongarch/op_helper.c
+++ b/target/loongarch/op_helper.c
@@ -49,14 +49,16 @@ target_ulong helper_bitswap(target_ulong v)
 void helper_asrtle_d(CPULoongArchState *env, target_ulong rj, target_ulong rk)
 {
     if (rj > rk) {
-        do_raise_exception(env, EXCCODE_BCE, 0);
+        env->CSR_BADV = rj;
+        do_raise_exception(env, EXCCODE_BCE, GETPC());
     }
 }
 
 void helper_asrtgt_d(CPULoongArchState *env, target_ulong rj, target_ulong rk)
 {
     if (rj <= rk) {
-        do_raise_exception(env, EXCCODE_BCE, 0);
+        env->CSR_BADV = rj;
+        do_raise_exception(env, EXCCODE_BCE, GETPC());
     }
 }
 
-- 
2.39.1

[PULL 2/2] target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump

[Song Gao]

The vinsgr2vr/vpickve2gr instructions need use get_src/get_dst to get
gpr registers value, not cpu_gpr[]. The $zero register does not
have cpu_gpr[0] allocated.

Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1662

Signed-off-by: Song Gao <gaosong@loongson.cn>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230525120005.2223413-1-gaosong@loongson.cn>
---
 target/loongarch/insn_trans/trans_lsx.c.inc | 39 ++++++++++++++-------
 1 file changed, 26 insertions(+), 13 deletions(-)

diff --git a/target/loongarch/insn_trans/trans_lsx.c.inc b/target/loongarch/insn_trans/trans_lsx.c.inc
index 0be2b5a3a8..68779daff6 100644
--- a/target/loongarch/insn_trans/trans_lsx.c.inc
+++ b/target/loongarch/insn_trans/trans_lsx.c.inc
@@ -3963,106 +3963,119 @@ TRANS(vsetallnez_d, gen_cv, gen_helper_vsetallnez_d)
 
 static bool trans_vinsgr2vr_b(DisasContext *ctx, arg_vr_i *a)
 {
+    TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_st8_i64(cpu_gpr[a->rj], cpu_env,
+    tcg_gen_st8_i64(src, cpu_env,
                     offsetof(CPULoongArchState, fpr[a->vd].vreg.B(a->imm)));
     return true;
 }
 
 static bool trans_vinsgr2vr_h(DisasContext *ctx, arg_vr_i *a)
 {
+    TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_st16_i64(cpu_gpr[a->rj], cpu_env,
+    tcg_gen_st16_i64(src, cpu_env,
                     offsetof(CPULoongArchState, fpr[a->vd].vreg.H(a->imm)));
     return true;
 }
 
 static bool trans_vinsgr2vr_w(DisasContext *ctx, arg_vr_i *a)
 {
+    TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_st32_i64(cpu_gpr[a->rj], cpu_env,
+    tcg_gen_st32_i64(src, cpu_env,
                      offsetof(CPULoongArchState, fpr[a->vd].vreg.W(a->imm)));
     return true;
 }
 
 static bool trans_vinsgr2vr_d(DisasContext *ctx, arg_vr_i *a)
 {
+    TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_st_i64(cpu_gpr[a->rj], cpu_env,
+    tcg_gen_st_i64(src, cpu_env,
                    offsetof(CPULoongArchState, fpr[a->vd].vreg.D(a->imm)));
     return true;
 }
 
 static bool trans_vpickve2gr_b(DisasContext *ctx, arg_rv_i *a)
 {
+    TCGv dst = gpr_dst(ctx, a->rd, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_ld8s_i64(cpu_gpr[a->rd], cpu_env,
+    tcg_gen_ld8s_i64(dst, cpu_env,
                      offsetof(CPULoongArchState, fpr[a->vj].vreg.B(a->imm)));
     return true;
 }
 
 static bool trans_vpickve2gr_h(DisasContext *ctx, arg_rv_i *a)
 {
+    TCGv dst = gpr_dst(ctx, a->rd, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_ld16s_i64(cpu_gpr[a->rd], cpu_env,
+    tcg_gen_ld16s_i64(dst, cpu_env,
                       offsetof(CPULoongArchState, fpr[a->vj].vreg.H(a->imm)));
     return true;
 }
 
 static bool trans_vpickve2gr_w(DisasContext *ctx, arg_rv_i *a)
 {
+    TCGv dst = gpr_dst(ctx, a->rd, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_ld32s_i64(cpu_gpr[a->rd], cpu_env,
+    tcg_gen_ld32s_i64(dst, cpu_env,
                       offsetof(CPULoongArchState, fpr[a->vj].vreg.W(a->imm)));
     return true;
 }
 
 static bool trans_vpickve2gr_d(DisasContext *ctx, arg_rv_i *a)
 {
+    TCGv dst = gpr_dst(ctx, a->rd, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_ld_i64(cpu_gpr[a->rd], cpu_env,
+    tcg_gen_ld_i64(dst, cpu_env,
                    offsetof(CPULoongArchState, fpr[a->vj].vreg.D(a->imm)));
     return true;
 }
 
 static bool trans_vpickve2gr_bu(DisasContext *ctx, arg_rv_i *a)
 {
+    TCGv dst = gpr_dst(ctx, a->rd, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_ld8u_i64(cpu_gpr[a->rd], cpu_env,
+    tcg_gen_ld8u_i64(dst, cpu_env,
                      offsetof(CPULoongArchState, fpr[a->vj].vreg.B(a->imm)));
     return true;
 }
 
 static bool trans_vpickve2gr_hu(DisasContext *ctx, arg_rv_i *a)
 {
+    TCGv dst = gpr_dst(ctx, a->rd, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_ld16u_i64(cpu_gpr[a->rd], cpu_env,
+    tcg_gen_ld16u_i64(dst, cpu_env,
                       offsetof(CPULoongArchState, fpr[a->vj].vreg.H(a->imm)));
     return true;
 }
 
 static bool trans_vpickve2gr_wu(DisasContext *ctx, arg_rv_i *a)
 {
+    TCGv dst = gpr_dst(ctx, a->rd, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_ld32u_i64(cpu_gpr[a->rd], cpu_env,
+    tcg_gen_ld32u_i64(dst, cpu_env,
                       offsetof(CPULoongArchState, fpr[a->vj].vreg.W(a->imm)));
     return true;
 }
 
 static bool trans_vpickve2gr_du(DisasContext *ctx, arg_rv_i *a)
 {
+    TCGv dst = gpr_dst(ctx, a->rd, EXT_NONE);
     CHECK_SXE;
-    tcg_gen_ld_i64(cpu_gpr[a->rd], cpu_env,
+    tcg_gen_ld_i64(dst, cpu_env,
                    offsetof(CPULoongArchState, fpr[a->vj].vreg.D(a->imm)));
     return true;
 }
 
 static bool gvec_dup(DisasContext *ctx, arg_vr *a, MemOp mop)
 {
+    TCGv src = gpr_src(ctx, a->rj, EXT_NONE);
     CHECK_SXE;
 
     tcg_gen_gvec_dup_i64(mop, vec_full_offset(a->vd),
-                         16, ctx->vl/8, cpu_gpr[a->rj]);
+                         16, ctx->vl/8, src);
     return true;
 }
 
-- 
2.39.1

Re: [PULL 0/2] loongarch-to-apply queue

[Richard Henderson]

On 5/26/23 02:27, Song Gao wrote:
> The following changes since commit a3cb6d5004ff638aefe686ecd540718a793bd1b1:
> 
>    Merge tag 'pull-tcg-20230525' ofhttps://gitlab.com/rth7680/qemu  into staging (2023-05-25 11:11:52 -0700)
> 
> are available in the Git repository at:
> 
>    https://gitlab.com/gaosong/qemu.git  tags/pull-loongarch-20230526
> 
> for you to fetch changes up to 65bfaaae6ac79ebc623acc0ce28cc3bd4fe8b5e5:
> 
>    target/loongarch: Fix the vinsgr2vr/vpickve2gr instructions cause system coredump (2023-05-26 17:21:16 +0800)
> 
> ----------------------------------------------------------------
> pull-loongarch-20230526

Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/8.1 as appropriate.


r~

[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit ca18b336e12c8433177a3cd639c5bf757952adaa:

  Merge tag 'pull-lu-20250828' of https://gitlab.com/rth7680/qemu into staging (2025-08-28 09:24:36 +1000)

are available in the Git repository at:

  https://github.com/gaosong715/qemu.git tags/pull-loongarch-20250828

for you to fetch changes up to 86bca40402316891b8b9a920c2e3bf8cf37ba9a4:

  hw/intc/loongarch_pch_pic: Fix ubsan warning and endianness issue (2025-08-28 20:06:27 +0800)

----------------------------------------------------------------
pull-loongarch-20250828

----------------------------------------------------------------
Thomas Huth (1):
      hw/intc/loongarch_pch_pic: Fix ubsan warning and endianness issue

WANG Rui (1):
      target/loongarch: Guard 64-bit-only insn translation with TRANS64 macro

 hw/intc/loongarch_pch_pic.c                        | 15 ++++-----
 target/loongarch/tcg/insn_trans/trans_atomic.c.inc | 36 +++++++++++-----------
 target/loongarch/tcg/insn_trans/trans_extra.c.inc  |  8 +++--
 target/loongarch/tcg/insn_trans/trans_farith.c.inc |  8 ++---
 target/loongarch/tcg/insn_trans/trans_fcnv.c.inc   |  4 +--
 .../loongarch/tcg/insn_trans/trans_fmemory.c.inc   | 16 +++++-----
 .../tcg/insn_trans/trans_privileged.c.inc          |  4 +--
 target/loongarch/tcg/insn_trans/trans_shift.c.inc  |  4 +--
 target/loongarch/translate.h                       |  4 +++
 9 files changed, 54 insertions(+), 45 deletions(-)

Re: [PULL 0/2] loongarch-to-apply queue

[Richard Henderson]

On 8/28/25 22:02, Song Gao wrote:
> The following changes since commit ca18b336e12c8433177a3cd639c5bf757952adaa:
> 
>    Merge tag 'pull-lu-20250828' of https://gitlab.com/rth7680/qemu into staging (2025-08-28 09:24:36 +1000)
> 
> are available in the Git repository at:
> 
>    https://github.com/gaosong715/qemu.git tags/pull-loongarch-20250828
> 
> for you to fetch changes up to 86bca40402316891b8b9a920c2e3bf8cf37ba9a4:
> 
>    hw/intc/loongarch_pch_pic: Fix ubsan warning and endianness issue (2025-08-28 20:06:27 +0800)
> 
> ----------------------------------------------------------------
> pull-loongarch-20250828


Applied, thanks.  Please update https://wiki.qemu.org/ChangeLog/10.2 as appropriate.

r~

[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit 4e06566dbd1b1251c2788af26a30bd148d4eb6c1:

  Merge tag 'pull-riscv-to-apply-20250730-2' of https://github.com/alistair23/qemu into staging (2025-07-30 09:59:30 -0400)

are available in the Git repository at:

  https://github.com/gaosong715/qemu.git tags/pull-loongarch-20250731

for you to fetch changes up to 31995cc4087123a13e9345153e0c39ffb44b9277:

  hw/intc/loongarch_ipi: Fix start fail with smp cpu < smp maxcpus on KVM (2025-07-31 16:57:01 +0800)

----------------------------------------------------------------
pull-loongarch-2025-0731-for-10.1

----------------------------------------------------------------
Bibo Mao (1):
      target/loongarch: Fix valid virtual address checking

Song Gao (1):
      hw/intc/loongarch_ipi: Fix start fail with smp cpu < smp maxcpus on KVM

 hw/intc/loongarch_ipi_kvm.c   | 27 ++++++++++++++++-----------
 target/loongarch/cpu_helper.c |  4 ++--
 2 files changed, 18 insertions(+), 13 deletions(-)

Re: [PULL 0/2] loongarch-to-apply queue

[Stefan Hajnoczi]

[-- Attachment #1: Type: text/plain, Size: 116 bytes --]

Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/10.1 for any user-visible changes.

[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 488 bytes --]

[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit 4a4efae44f19528589204581e9e2fab69c5d39aa:

  Merge tag 'pull-hex-20240121' of https://github.com/quic/qemu into staging (2024-01-23 13:40:45 +0000)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240125

for you to fetch changes up to fc70099621fe7002d30fc1509456d1ae57264aa6:

  target/loongarch/kvm: Enable LSX/LASX extension (2024-01-25 15:25:31 +0800)

----------------------------------------------------------------
pull-loongarch-20240125

----------------------------------------------------------------
Bibo Mao (1):
      target/loongarch: Set cpuid CSR register only once with kvm mode

Song Gao (1):
      target/loongarch/kvm: Enable LSX/LASX extension

 linux-headers/asm-loongarch/kvm.h |  1 +
 target/loongarch/kvm/kvm.c        | 54 +++++++++++++++++++++++++++++++--------
 2 files changed, 45 insertions(+), 10 deletions(-)

Re: [PULL 0/2] loongarch-to-apply queue

[Peter Maydell]

On Thu, 25 Jan 2024 at 07:31, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit 4a4efae44f19528589204581e9e2fab69c5d39aa:
>
>   Merge tag 'pull-hex-20240121' of https://github.com/quic/qemu into staging (2024-01-23 13:40:45 +0000)
>
> are available in the Git repository at:
>
>   https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240125
>
> for you to fetch changes up to fc70099621fe7002d30fc1509456d1ae57264aa6:
>
>   target/loongarch/kvm: Enable LSX/LASX extension (2024-01-25 15:25:31 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-20240125
>
> ----------------------------------------------------------------


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.0
for any user-visible changes.

-- PMM

[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit 4a4efae44f19528589204581e9e2fab69c5d39aa:

  Merge tag 'pull-hex-20240121' of https://github.com/quic/qemu into staging (2024-01-23 13:40:45 +0000)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240125

for you to fetch changes up to fc70099621fe7002d30fc1509456d1ae57264aa6:

  target/loongarch/kvm: Enable LSX/LASX extension (2024-01-25 15:25:31 +0800)

----------------------------------------------------------------
pull-loongarch-20240125

----------------------------------------------------------------
Bibo Mao (1):
      target/loongarch: Set cpuid CSR register only once with kvm mode

Song Gao (1):
      target/loongarch/kvm: Enable LSX/LASX extension

 linux-headers/asm-loongarch/kvm.h |  1 +
 target/loongarch/kvm/kvm.c        | 54 +++++++++++++++++++++++++++++++--------
 2 files changed, 45 insertions(+), 10 deletions(-)

[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit 4a4efae44f19528589204581e9e2fab69c5d39aa:

  Merge tag 'pull-hex-20240121' of https://github.com/quic/qemu into staging (2024-01-23 13:40:45 +0000)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240125

for you to fetch changes up to fc70099621fe7002d30fc1509456d1ae57264aa6:

  target/loongarch/kvm: Enable LSX/LASX extension (2024-01-25 15:25:31 +0800)

----------------------------------------------------------------
pull-loongarch-20240125

----------------------------------------------------------------
Bibo Mao (1):
      target/loongarch: Set cpuid CSR register only once with kvm mode

Song Gao (1):
      target/loongarch/kvm: Enable LSX/LASX extension

 linux-headers/asm-loongarch/kvm.h |  1 +
 target/loongarch/kvm/kvm.c        | 54 +++++++++++++++++++++++++++++++--------
 2 files changed, 45 insertions(+), 10 deletions(-)

[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit d328fef93ae757a0dd65ed786a4086e27952eef3:

  Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging (2024-01-04 10:23:34 +0000)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240105

for you to fetch changes up to 0cd8b379081fa71c23836052feb65da4685f8ec7:

  target/loongarch: move translate modules to tcg/ (2024-01-05 09:31:05 +0800)

----------------------------------------------------------------
pull-loongarch-20240105

----------------------------------------------------------------
Song Gao (2):
      target/loongarch/meson: move gdbstub.c to loongarch.ss
      target/loongarch: move translate modules to tcg/

 target/loongarch/meson.build                          | 15 +--------------
 target/loongarch/{ => tcg}/constant_timer.c           |  0
 target/loongarch/{ => tcg}/csr_helper.c               |  0
 target/loongarch/{ => tcg}/fpu_helper.c               |  0
 .../loongarch/{ => tcg}/insn_trans/trans_arith.c.inc  |  0
 .../loongarch/{ => tcg}/insn_trans/trans_atomic.c.inc |  0
 target/loongarch/{ => tcg}/insn_trans/trans_bit.c.inc |  0
 .../loongarch/{ => tcg}/insn_trans/trans_branch.c.inc |  0
 .../loongarch/{ => tcg}/insn_trans/trans_extra.c.inc  |  0
 .../loongarch/{ => tcg}/insn_trans/trans_farith.c.inc |  0
 .../loongarch/{ => tcg}/insn_trans/trans_fcmp.c.inc   |  0
 .../loongarch/{ => tcg}/insn_trans/trans_fcnv.c.inc   |  0
 .../{ => tcg}/insn_trans/trans_fmemory.c.inc          |  0
 .../loongarch/{ => tcg}/insn_trans/trans_fmov.c.inc   |  0
 .../loongarch/{ => tcg}/insn_trans/trans_memory.c.inc |  0
 .../{ => tcg}/insn_trans/trans_privileged.c.inc       |  0
 .../loongarch/{ => tcg}/insn_trans/trans_shift.c.inc  |  0
 target/loongarch/{ => tcg}/insn_trans/trans_vec.c.inc |  0
 target/loongarch/{ => tcg}/iocsr_helper.c             |  0
 target/loongarch/tcg/meson.build                      | 19 +++++++++++++++++++
 target/loongarch/{ => tcg}/op_helper.c                |  0
 target/loongarch/{ => tcg}/tlb_helper.c               |  0
 target/loongarch/{ => tcg}/translate.c                |  0
 target/loongarch/{ => tcg}/vec_helper.c               |  0
 24 files changed, 20 insertions(+), 14 deletions(-)
 rename target/loongarch/{ => tcg}/constant_timer.c (100%)
 rename target/loongarch/{ => tcg}/csr_helper.c (100%)
 rename target/loongarch/{ => tcg}/fpu_helper.c (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_arith.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_atomic.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_bit.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_branch.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_extra.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_farith.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_fcmp.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_fcnv.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_fmemory.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_fmov.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_memory.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_privileged.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_shift.c.inc (100%)
 rename target/loongarch/{ => tcg}/insn_trans/trans_vec.c.inc (100%)
 rename target/loongarch/{ => tcg}/iocsr_helper.c (100%)
 create mode 100644 target/loongarch/tcg/meson.build
 rename target/loongarch/{ => tcg}/op_helper.c (100%)
 rename target/loongarch/{ => tcg}/tlb_helper.c (100%)
 rename target/loongarch/{ => tcg}/translate.c (100%)
 rename target/loongarch/{ => tcg}/vec_helper.c (100%)

Re: [PULL 0/2] loongarch-to-apply queue

[Peter Maydell]

On Fri, 5 Jan 2024 at 01:30, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit d328fef93ae757a0dd65ed786a4086e27952eef3:
>
>   Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging (2024-01-04 10:23:34 +0000)
>
> are available in the Git repository at:
>
>   https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240105
>
> for you to fetch changes up to 0cd8b379081fa71c23836052feb65da4685f8ec7:
>
>   target/loongarch: move translate modules to tcg/ (2024-01-05 09:31:05 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-20240105
>
> ----------------------------------------------------------------
> Song Gao (2):
>       target/loongarch/meson: move gdbstub.c to loongarch.ss
>       target/loongarch: move translate modules to tcg/

Hi; this fails to build, with

../target/loongarch/tcg/meson.build:1:3: ERROR: Unknown variable "config_all".

(eg https://gitlab.com/qemu-project/qemu/-/jobs/5868662017)

I think your pullreq has unfortunately got a conflict with the
meson cleanup patches that I just applied from Paolo.

Could you have a look at this and respin the pullreq, please?

thanks
-- PMM

Re: [PULL 0/2] loongarch-to-apply queue

[gaosong]

在 2024/1/5 下午9:34, Peter Maydell 写道:
> On Fri, 5 Jan 2024 at 01:30, Song Gao <gaosong@loongson.cn> wrote:
>> The following changes since commit d328fef93ae757a0dd65ed786a4086e27952eef3:
>>
>>    Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging (2024-01-04 10:23:34 +0000)
>>
>> are available in the Git repository at:
>>
>>    https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20240105
>>
>> for you to fetch changes up to 0cd8b379081fa71c23836052feb65da4685f8ec7:
>>
>>    target/loongarch: move translate modules to tcg/ (2024-01-05 09:31:05 +0800)
>>
>> ----------------------------------------------------------------
>> pull-loongarch-20240105
>>
>> ----------------------------------------------------------------
>> Song Gao (2):
>>        target/loongarch/meson: move gdbstub.c to loongarch.ss
>>        target/loongarch: move translate modules to tcg/
> Hi; this fails to build, with
>
> ../target/loongarch/tcg/meson.build:1:3: ERROR: Unknown variable "config_all".
>
> (eg https://gitlab.com/qemu-project/qemu/-/jobs/5868662017)
>
> I think your pullreq has unfortunately got a conflict with the
> meson cleanup patches that I just applied from Paolo.
>
> Could you have a look at this and respin the pullreq, please?
Sure, I will.

Thanks.
Song Gao.

[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit 191710c221f65b1542f6ea7fa4d30dde6e134fd7:

  Merge tag 'pull-request-2023-12-20' of https://gitlab.com/thuth/qemu into staging (2023-12-20 09:40:16 -0500)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20231221

for you to fetch changes up to be45144bee708d3b84c3c474a4d4aeb7e5c4733a:

  target/loongarch: Add timer information dump support (2023-12-21 16:07:47 +0800)

----------------------------------------------------------------
pull-loongarch-20231221

----------------------------------------------------------------
Bibo Mao (2):
      hw/loongarch/virt: Align high memory base address with super page size
      target/loongarch: Add timer information dump support

 include/hw/loongarch/virt.h | 2 +-
 target/loongarch/cpu.c      | 2 ++
 2 files changed, 3 insertions(+), 1 deletion(-)

Re: [PULL 0/2] loongarch-to-apply queue

[Stefan Hajnoczi]

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Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/9.0 for any user-visible changes.

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[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit 2f3913f4b2ad74baeb5a6f1d36efbd9ecdf1057d:

  Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging (2023-10-05 09:01:01 -0400)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20231008

for you to fetch changes up to e1fc0cf1fb65c5f049bef4661d0e3278e51e2560:

  target/loongarch: Add preldx instruction (2023-10-08 15:02:15 +0800)

----------------------------------------------------------------
pull-loongarch-20231008

----------------------------------------------------------------
Jiajie Chen (1):
      target/loongarch: fix ASXE flag conflict

Song Gao (1):
      target/loongarch: Add preldx instruction

 target/loongarch/cpu.h                         | 4 ++--
 target/loongarch/disas.c                       | 7 +++++++
 target/loongarch/insn_trans/trans_memory.c.inc | 5 +++++
 target/loongarch/insns.decode                  | 3 +++
 4 files changed, 17 insertions(+), 2 deletions(-)

[PULL 0/2] loongarch-to-apply queue

[Song Gao]

The following changes since commit efcd0ec14b0fe9ee0ee70277763b2d538d19238d:

  Merge tag 'misc-fixes-20230330' of https://github.com/philmd/qemu into staging (2023-03-30 14:22:29 +0100)

are available in the Git repository at:

  https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230404

for you to fetch changes up to ec28dd6c6fc1366504003c25828953cac49e2da7:

  target/loongarch: Enables plugins to get instruction codes (2023-04-04 19:33:23 +0800)

----------------------------------------------------------------
pull-loongarch-20230404

----------------------------------------------------------------
Tianrui Zhao (1):
      hw/loongarch/virt: Fix virt_to_phys_addr function

tanhongze (1):
      target/loongarch: Enables plugins to get instruction codes

 hw/loongarch/virt.c          | 2 +-
 target/loongarch/translate.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

Re: [PULL 0/2] loongarch-to-apply queue

[Peter Maydell]

On Tue, 4 Apr 2023 at 12:38, Song Gao <gaosong@loongson.cn> wrote:
>
> The following changes since commit efcd0ec14b0fe9ee0ee70277763b2d538d19238d:
>
>   Merge tag 'misc-fixes-20230330' of https://github.com/philmd/qemu into staging (2023-03-30 14:22:29 +0100)
>
> are available in the Git repository at:
>
>   https://gitlab.com/gaosong/qemu.git tags/pull-loongarch-20230404
>
> for you to fetch changes up to ec28dd6c6fc1366504003c25828953cac49e2da7:
>
>   target/loongarch: Enables plugins to get instruction codes (2023-04-04 19:33:23 +0800)
>
> ----------------------------------------------------------------
> pull-loongarch-20230404
>


Applied, thanks.

Please update the changelog at https://wiki.qemu.org/ChangeLog/8.0
for any user-visible changes.

-- PMM