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From: Paolo Bonzini <pbonzini@redhat.com>
To: Rob Landley <rob@landley.net>,
	qemu-devel@nongnu.org, Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [Qemu-devel] qemu-system-sh4 -M r2d serial is broken.
Date: Thu, 18 May 2017 21:57:59 +0200	[thread overview]
Message-ID: <c07840b7-29ce-1866-d739-ebe2646a040d@redhat.com> (raw)
In-Reply-To: <f0c4de76-77a7-90c4-6a99-10ddda953b19@landley.net>



On 18/05/2017 18:08, Rob Landley wrote:
> Serial input hangs after the first character in the 4.11 kernel:
> 
>   http://www.spinics.net/lists/linux-sh/msg51183.html
> 
> Because they enabled support for a buffer size thing QEMU doesn't
> emulate right:
> 
>   http://www.spinics.net/lists/linux-sh/msg51189.html

Hey,

regarding this:

> The really _fun_ thing about this is qemu broke it a couple years back
> and now if you hit ctrl-c it kills the _emulator_ rather than passing it
> through to the Linux console. (Just sh4, the rest do it right.)

Try replacing "-serial stdio" with "-serial mon:stdio".  You'll also be
able to use the QEMU monitor with "Ctrl-a c", so you can quit with
"Ctrl-a c quit <enter>".

> Very likely given how crappy the rest of its serial emulation is for
> this architecture, but ever since qemu added glib support I've stopped
> trying to understand their developers' thought processes.

I'm sure this is going to help you get support, right?

Anyway, Uli Hecht is saying SCIF "asserts DR even if the FIFO threshold
has not been reached if no data is received for 1.5 frames".  If that's
just a register and doesn't trigger an interrupt, you can compute the
bit's value dynamically based on the current clock.

This is for example how the x86 RTC chip computes the "update in
progress" bit, which is set for 220 us before the RC updates.  Doing
that with a timer would be really imprecise.

Paolo

  parent reply	other threads:[~2017-05-18 19:58 UTC|newest]

Thread overview: 12+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-05-18 16:08 [Qemu-devel] qemu-system-sh4 -M r2d serial is broken Rob Landley
2017-05-18 19:00 ` Aurelien Jarno
2017-05-18 22:37   ` Rob Landley
2017-05-18 23:01     ` Aurelien Jarno
2017-06-05 22:29       ` Rob Landley
2017-06-06 16:21         ` Aurelien Jarno
2017-05-18 19:57 ` Paolo Bonzini [this message]
2017-05-18 20:10   ` Aurelien Jarno
2017-05-18 20:48     ` Paolo Bonzini
2017-05-18 22:35   ` Rob Landley
2017-05-18 23:00     ` Aurelien Jarno
2017-05-19  5:05       ` Rob Landley

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