From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: Richard Henderson <richard.henderson@linaro.org>, qemu-devel@nongnu.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
qemu-ppc@nongnu.org, Chinmay Rath <rathc@linux.ibm.com>,
anushree.mathur@linux.ibm.com
Subject: Re: [PATCH v2 06/12] hw/ppc/spapr: Use tb_invalidate_phys_range in h_page_init
Date: Tue, 23 Sep 2025 10:19:48 +0530 [thread overview]
Message-ID: <c13cb29e-88c5-4751-9273-4e9833289f75@linux.ibm.com> (raw)
In-Reply-To: <20250923023922.3102471-7-richard.henderson@linaro.org>
+ Chinmay, Anu - FYI
On 9/23/25 08:09, Richard Henderson wrote:
> We only need invalidate tbs from a single page, not flush
> all translations.
>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
> Cc: Nicholas Piggin <npiggin@gmail.com>
> Cc: Harsh Prateek Bora <harshpb@linux.ibm.com>
> Cc: qemu-ppc@nongnu.org
> ---
> hw/ppc/spapr_hcall.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index c594d4b916..feb31d5dd8 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -8,7 +8,7 @@
> #include "qemu/main-loop.h"
> #include "qemu/module.h"
> #include "qemu/error-report.h"
> -#include "exec/tb-flush.h"
> +#include "exec/translation-block.h"
> #include "exec/target_page.h"
> #include "helper_regs.h"
> #include "hw/ppc/ppc.h"
> @@ -301,7 +301,7 @@ static target_ulong h_page_init(PowerPCCPU *cpu, SpaprMachineState *spapr,
> if (kvm_enabled()) {
> kvmppc_icbi_range(cpu, pdst, len);
> } else if (tcg_enabled()) {
> - tb_flush(CPU(cpu));
> + tb_invalidate_phys_range(CPU(cpu), dst, len);
Much needed improvement. Thanks.
Reviewed-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
> } else {
> g_assert_not_reached();
> }
next prev parent reply other threads:[~2025-09-23 4:51 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-23 2:39 [PATCH v2 00/12] accel/tcg: Improve tb_flush usage Richard Henderson
2025-09-23 2:39 ` [PATCH v2 01/12] gdbstub: Remove tb_flush uses Richard Henderson
2025-09-23 9:11 ` Philippe Mathieu-Daudé
2025-09-23 16:23 ` Richard Henderson
2025-09-23 2:39 ` [PATCH v2 02/12] accel/tcg: Split out tb_flush__exclusive Richard Henderson
2025-09-23 7:17 ` Philippe Mathieu-Daudé
2025-09-23 9:16 ` Philippe Mathieu-Daudé
2025-09-23 2:39 ` [PATCH v2 03/12] target/alpha: Simplify call_pal implementation Richard Henderson
2025-09-23 7:30 ` Philippe Mathieu-Daudé
2025-09-23 9:05 ` Philippe Mathieu-Daudé
2025-09-23 2:39 ` [PATCH v2 04/12] target/riscv: Record misa_ext in TCGTBCPUState.cs_base Richard Henderson
2025-09-24 6:17 ` LIU Zhiwei
2025-09-24 12:23 ` Daniel Henrique Barboza
2025-09-28 23:10 ` Alistair Francis
2025-09-23 2:39 ` [PATCH v2 05/12] accel/tcg: Move post-load tb_flush to vm_change_state hook Richard Henderson
2025-09-23 7:22 ` Philippe Mathieu-Daudé
2025-09-23 2:39 ` [PATCH v2 06/12] hw/ppc/spapr: Use tb_invalidate_phys_range in h_page_init Richard Henderson
2025-09-23 4:49 ` Harsh Prateek Bora [this message]
2025-09-23 8:55 ` Philippe Mathieu-Daudé
2025-09-23 9:45 ` Harsh Prateek Bora
2025-09-23 16:59 ` Richard Henderson
2025-09-23 2:39 ` [PATCH v2 07/12] linux-user: Use tb_flush_exclusive to start second thread Richard Henderson
2025-09-23 8:50 ` Philippe Mathieu-Daudé
2025-09-23 2:39 ` [PATCH v2 08/12] plugins: Use tb_flush__exclusive Richard Henderson
2025-09-23 7:33 ` Philippe Mathieu-Daudé
2025-09-23 13:35 ` Philippe Mathieu-Daudé
2025-09-23 20:28 ` Richard Henderson
2025-09-24 3:18 ` Philippe Mathieu-Daudé
2025-09-23 2:39 ` [PATCH v2 09/12] accel/tcg: Introduce EXCP_TB_FLUSH Richard Henderson
2025-09-23 7:10 ` Paolo Bonzini
2025-09-23 20:02 ` Richard Henderson
2025-09-23 2:39 ` [PATCH v2 10/12] accel/tcg: Use EXCP_TB_FLUSH in tb_gen_code Richard Henderson
2025-09-23 9:15 ` Philippe Mathieu-Daudé
2025-09-23 2:39 ` [PATCH v2 11/12] accel/tcg: Remove tb_flush Richard Henderson
2025-09-23 7:24 ` Philippe Mathieu-Daudé
2025-09-23 2:39 ` [PATCH v2 12/12] accel/tcg: Tighten assert in tb_flush__exclusive Richard Henderson
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