qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Richard Henderson <richard.henderson@linaro.org>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Alex Bennée" <alex.bennee@linaro.org>,
	"Laszlo Ersek" <lersek@redhat.com>,
	"QEMU Developers" <qemu-devel@nongnu.org>,
	"Philippe Mathieu-Daudé" <philmd@redhat.com>
Subject: Re: [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support
Date: Tue, 16 Jul 2019 08:04:03 -0700	[thread overview]
Message-ID: <c15bcb9c-170a-380e-0ec5-4681b641e130@linaro.org> (raw)
In-Reply-To: <CAFEAcA-EqXU3vM63bK4+Yo1j07fZpD_=gapB_5_ygrJFk2-Rsw@mail.gmail.com>

On 7/16/19 2:18 PM, Peter Maydell wrote:
> On Tue, 16 Jul 2019 at 15:02, Richard Henderson
> <richard.henderson@linaro.org> wrote:
>>
>> On 7/16/19 12:03 PM, Peter Maydell wrote:
>>> The intention of the assertion really is to catch QEMU bugs
>>> where we got the ID register values wrong in our emulated
>>> CPUs. Perhaps we should relax all these assertions to only
>>> testing if we're using TCG, not KVM ?
>>
>> Perhaps.  In some instances if ID register values are wrong we would then not
>> migrate properly, but none of the checks we're currently doing of this sort
>> would catch those particular cases.
> 
> In those cases we should probably print a warning and install
> a migration-blocker, rather than asserting...

Ok, but I'm saying we don't assert for those either, at the moment.


r~


  reply	other threads:[~2019-07-16 15:04 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-02 17:16 [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 01/10] hw/arm/virt: Set VIRT_COMPAT_3_0 compat Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 02/10] hw/char: Implement nRF51 SoC UART Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 03/10] hw/arm/nrf51_soc: Connect UART to nRF51 SoC Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 04/10] tests/boot-serial-test: Add microbit board testcase Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 05/10] MAINTAINERS: Remove bouncing email in ARM ACPI Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 06/10] strongarm: mask off high[31:28] bits from dir and state registers Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 07/10] hw/arm/xilinx_zynq: Use the ARRAY_SIZE macro Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 08/10] target/arm: Conditionalize some asserts on aarch32 support Peter Maydell
2019-05-24 12:33   ` Laszlo Ersek
2019-05-24 12:45     ` Laszlo Ersek
2019-05-24 13:11     ` Philippe Mathieu-Daudé
2019-07-16 12:03     ` Peter Maydell
2019-07-16 14:02       ` Richard Henderson
2019-07-16 14:18         ` Peter Maydell
2019-07-16 15:04           ` Richard Henderson [this message]
2019-07-16 16:50       ` Laszlo Ersek
2019-07-16 16:59         ` Peter Maydell
2019-07-16 18:42           ` Laszlo Ersek
2019-07-16 20:10             ` Philippe Mathieu-Daudé
2019-07-17  8:36               ` Laszlo Ersek
2019-07-17  9:22                 ` Laszlo Ersek
2019-07-17  9:24                   ` Laszlo Ersek
2019-07-17 12:49                   ` Laszlo Ersek
2019-07-17 12:53                   ` Laszlo Ersek
2019-07-17 13:36                   ` Philippe Mathieu-Daudé
2019-07-17 13:46                     ` Peter Maydell
2019-07-17 15:08                       ` Laszlo Ersek
2019-07-18 12:30                         ` Peter Maydell
2019-07-18 19:07                           ` Laszlo Ersek
2019-07-17 13:45                   ` Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 09/10] hw/arm: versal: Add a model of Xilinx Versal SoC Peter Maydell
2018-11-02 17:16 ` [Qemu-devel] [PULL 10/10] hw/arm: versal: Add a virtual Xilinx Versal board Peter Maydell
2018-12-04 10:28   ` Peter Maydell
2018-12-12 22:05     ` Edgar E. Iglesias
2022-01-27 13:10   ` Peter Maydell
2022-01-30 10:33     ` Edgar E. Iglesias
2018-11-02 18:22 ` [Qemu-devel] [PULL v3 00/10] target-arm queue Peter Maydell

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=c15bcb9c-170a-380e-0ec5-4681b641e130@linaro.org \
    --to=richard.henderson@linaro.org \
    --cc=alex.bennee@linaro.org \
    --cc=lersek@redhat.com \
    --cc=peter.maydell@linaro.org \
    --cc=philmd@redhat.com \
    --cc=qemu-devel@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).