* [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally
@ 2020-09-05 21:24 Philippe Mathieu-Daudé
2020-09-06 7:35 ` Cédric Le Goater
2020-09-15 17:23 ` Philippe Mathieu-Daudé
0 siblings, 2 replies; 9+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-05 21:24 UTC (permalink / raw)
To: qemu-devel
Cc: Peter Maydell, Andrew Jeffery, Philippe Mathieu-Daudé,
qemu-arm, Cédric Le Goater, Joel Stanley
The UART5 is present on the machine regardless there is a
character device connected to it. Map it unconditionally.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---
hw/arm/aspeed_ast2600.c | 8 +++-----
hw/arm/aspeed_soc.c | 8 +++-----
2 files changed, 6 insertions(+), 10 deletions(-)
diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
index 9d95e421435..1450bde7cf2 100644
--- a/hw/arm/aspeed_ast2600.c
+++ b/hw/arm/aspeed_ast2600.c
@@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
}
/* UART - attach an 8250 to the IO space as our UART5 */
- if (serial_hd(0)) {
- qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
- serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
- uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
- }
+ serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
+ aspeed_soc_get_irq(s, ASPEED_DEV_UART5),
+ 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
/* I2C */
object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index 35be126db6f..7eefd54ac07 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspeed_soc.c
@@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
}
/* UART - attach an 8250 to the IO space as our UART5 */
- if (serial_hd(0)) {
- qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
- serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
- uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
- }
+ serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
+ aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400,
+ serial_hd(0), DEVICE_LITTLE_ENDIAN);
/* I2C */
object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
--
2.26.2
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally
2020-09-05 21:24 [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally Philippe Mathieu-Daudé
@ 2020-09-06 7:35 ` Cédric Le Goater
2020-09-15 17:23 ` Philippe Mathieu-Daudé
1 sibling, 0 replies; 9+ messages in thread
From: Cédric Le Goater @ 2020-09-06 7:35 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, Joel Stanley
On 9/5/20 11:24 PM, Philippe Mathieu-Daudé wrote:
> The UART5 is present on the machine regardless there is a
> character device connected to it. Map it unconditionally.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
> ---
> hw/arm/aspeed_ast2600.c | 8 +++-----
> hw/arm/aspeed_soc.c | 8 +++-----
> 2 files changed, 6 insertions(+), 10 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index 9d95e421435..1450bde7cf2 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
> }
>
> /* UART - attach an 8250 to the IO space as our UART5 */
> - if (serial_hd(0)) {
> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
> - }
> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5),
> + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
>
> /* I2C */
> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> index 35be126db6f..7eefd54ac07 100644
> --- a/hw/arm/aspeed_soc.c
> +++ b/hw/arm/aspeed_soc.c
> @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
> }
>
> /* UART - attach an 8250 to the IO space as our UART5 */
> - if (serial_hd(0)) {
> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
> - }
> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400,
> + serial_hd(0), DEVICE_LITTLE_ENDIAN);
>
> /* I2C */
> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally
2020-09-05 21:24 [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally Philippe Mathieu-Daudé
2020-09-06 7:35 ` Cédric Le Goater
@ 2020-09-15 17:23 ` Philippe Mathieu-Daudé
2020-09-16 5:51 ` Cédric Le Goater
1 sibling, 1 reply; 9+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-15 17:23 UTC (permalink / raw)
To: qemu-devel
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, Cédric Le Goater,
Joel Stanley
ping?
On 9/5/20 11:24 PM, Philippe Mathieu-Daudé wrote:
> The UART5 is present on the machine regardless there is a
> character device connected to it. Map it unconditionally.
>
> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
> ---
> hw/arm/aspeed_ast2600.c | 8 +++-----
> hw/arm/aspeed_soc.c | 8 +++-----
> 2 files changed, 6 insertions(+), 10 deletions(-)
>
> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
> index 9d95e421435..1450bde7cf2 100644
> --- a/hw/arm/aspeed_ast2600.c
> +++ b/hw/arm/aspeed_ast2600.c
> @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
> }
>
> /* UART - attach an 8250 to the IO space as our UART5 */
> - if (serial_hd(0)) {
> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
> - }
> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5),
> + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
>
> /* I2C */
> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
> index 35be126db6f..7eefd54ac07 100644
> --- a/hw/arm/aspeed_soc.c
> +++ b/hw/arm/aspeed_soc.c
> @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
> }
>
> /* UART - attach an 8250 to the IO space as our UART5 */
> - if (serial_hd(0)) {
> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
> - }
> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400,
> + serial_hd(0), DEVICE_LITTLE_ENDIAN);
>
> /* I2C */
> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally
2020-09-15 17:23 ` Philippe Mathieu-Daudé
@ 2020-09-16 5:51 ` Cédric Le Goater
2020-09-17 16:57 ` Philippe Mathieu-Daudé
0 siblings, 1 reply; 9+ messages in thread
From: Cédric Le Goater @ 2020-09-16 5:51 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, Joel Stanley
On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote:
> ping?
It's reviewed :
http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/
I will send a PR when I have more patches.
Thanks,
C.
> On 9/5/20 11:24 PM, Philippe Mathieu-Daudé wrote:
>> The UART5 is present on the machine regardless there is a
>> character device connected to it. Map it unconditionally.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>> ---
>> hw/arm/aspeed_ast2600.c | 8 +++-----
>> hw/arm/aspeed_soc.c | 8 +++-----
>> 2 files changed, 6 insertions(+), 10 deletions(-)
>>
>> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
>> index 9d95e421435..1450bde7cf2 100644
>> --- a/hw/arm/aspeed_ast2600.c
>> +++ b/hw/arm/aspeed_ast2600.c
>> @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
>> }
>>
>> /* UART - attach an 8250 to the IO space as our UART5 */
>> - if (serial_hd(0)) {
>> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
>> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
>> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
>> - }
>> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
>> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5),
>> + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
>>
>> /* I2C */
>> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
>> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
>> index 35be126db6f..7eefd54ac07 100644
>> --- a/hw/arm/aspeed_soc.c
>> +++ b/hw/arm/aspeed_soc.c
>> @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
>> }
>>
>> /* UART - attach an 8250 to the IO space as our UART5 */
>> - if (serial_hd(0)) {
>> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
>> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
>> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
>> - }
>> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
>> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400,
>> + serial_hd(0), DEVICE_LITTLE_ENDIAN);
>>
>> /* I2C */
>> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
>>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally
2020-09-16 5:51 ` Cédric Le Goater
@ 2020-09-17 16:57 ` Philippe Mathieu-Daudé
2020-09-17 17:03 ` Cédric Le Goater
0 siblings, 1 reply; 9+ messages in thread
From: Philippe Mathieu-Daudé @ 2020-09-17 16:57 UTC (permalink / raw)
To: Cédric Le Goater, qemu-devel
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, Joel Stanley
On 9/16/20 7:51 AM, Cédric Le Goater wrote:
> On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote:
>> ping?
>
> It's reviewed :
>
> http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/
>
Yes I know :) This is part of my routine to check if a
patch hasn't been confirmed to be queued 1 week after the
last review, to ping the maintainer (because some
automatically flush patches older than 1month in their
mailbox).
> I will send a PR when I have more patches.
Ah OK. I didn't know you would keep merging the Aspeed
patches. Since this was a single patch, I thought it would
go via the usual qemu-arm queue from Peter.
No rush, I just wanted to be sure the patch was not lost.
Also, once a patch is queued, I understand it is the
maintainer responsibility to keep rebasing the patch
queued.
Thanks!
Phil.
>
> Thanks,
>
> C.
>
>> On 9/5/20 11:24 PM, Philippe Mathieu-Daudé wrote:
>>> The UART5 is present on the machine regardless there is a
>>> character device connected to it. Map it unconditionally.
>>>
>>> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
>>> ---
>>> hw/arm/aspeed_ast2600.c | 8 +++-----
>>> hw/arm/aspeed_soc.c | 8 +++-----
>>> 2 files changed, 6 insertions(+), 10 deletions(-)
>>>
>>> diff --git a/hw/arm/aspeed_ast2600.c b/hw/arm/aspeed_ast2600.c
>>> index 9d95e421435..1450bde7cf2 100644
>>> --- a/hw/arm/aspeed_ast2600.c
>>> +++ b/hw/arm/aspeed_ast2600.c
>>> @@ -325,11 +325,9 @@ static void aspeed_soc_ast2600_realize(DeviceState *dev, Error **errp)
>>> }
>>>
>>> /* UART - attach an 8250 to the IO space as our UART5 */
>>> - if (serial_hd(0)) {
>>> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
>>> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
>>> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
>>> - }
>>> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
>>> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5),
>>> + 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
>>>
>>> /* I2C */
>>> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
>>> diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
>>> index 35be126db6f..7eefd54ac07 100644
>>> --- a/hw/arm/aspeed_soc.c
>>> +++ b/hw/arm/aspeed_soc.c
>>> @@ -283,11 +283,9 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
>>> }
>>>
>>> /* UART - attach an 8250 to the IO space as our UART5 */
>>> - if (serial_hd(0)) {
>>> - qemu_irq uart5 = aspeed_soc_get_irq(s, ASPEED_DEV_UART5);
>>> - serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
>>> - uart5, 38400, serial_hd(0), DEVICE_LITTLE_ENDIAN);
>>> - }
>>> + serial_mm_init(get_system_memory(), sc->memmap[ASPEED_DEV_UART5], 2,
>>> + aspeed_soc_get_irq(s, ASPEED_DEV_UART5), 38400,
>>> + serial_hd(0), DEVICE_LITTLE_ENDIAN);
>>>
>>> /* I2C */
>>> object_property_set_link(OBJECT(&s->i2c), "dram", OBJECT(s->dram_mr),
>>>
>
>
^ permalink raw reply [flat|nested] 9+ messages in thread* Re: [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally
2020-09-17 16:57 ` Philippe Mathieu-Daudé
@ 2020-09-17 17:03 ` Cédric Le Goater
2020-09-30 5:29 ` Andrew Jeffery
0 siblings, 1 reply; 9+ messages in thread
From: Cédric Le Goater @ 2020-09-17 17:03 UTC (permalink / raw)
To: Philippe Mathieu-Daudé, qemu-devel
Cc: Andrew Jeffery, Peter Maydell, qemu-arm, Joel Stanley
On 9/17/20 6:57 PM, Philippe Mathieu-Daudé wrote:
> On 9/16/20 7:51 AM, Cédric Le Goater wrote:
>> On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote:
>>> ping?
>>
>> It's reviewed :
>>
>> http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/
>>
>
> Yes I know :) This is part of my routine to check if a
> patch hasn't been confirmed to be queued 1 week after the
> last review, to ping the maintainer (because some
> automatically flush patches older than 1month in their
> mailbox).
ooh. That's brutal.
>> I will send a PR when I have more patches.
>
> Ah OK. I didn't know you would keep merging the Aspeed
> patches. Since this was a single patch, I thought it would
> go via the usual qemu-arm queue from Peter.
sure. It could also. Fine with me. I have only three for the
moment.
> No rush, I just wanted to be sure the patch was not lost.
> Also, once a patch is queued, I understand it is the
> maintainer responsibility to keep rebasing the patch
> queued.
yes. I know. I have been taking care of Andrew's ADC patches
since 2017 ... cough cough :)
Cheers,
C.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally
2020-09-17 17:03 ` Cédric Le Goater
@ 2020-09-30 5:29 ` Andrew Jeffery
2020-09-30 10:07 ` Cédric Le Goater
0 siblings, 1 reply; 9+ messages in thread
From: Andrew Jeffery @ 2020-09-30 5:29 UTC (permalink / raw)
To: Cédric Le Goater, Philippe Mathieu-Daudé,
Cameron Esfahani via
Cc: Peter Maydell, qemu-arm, Joel Stanley
On Fri, 18 Sep 2020, at 02:33, Cédric Le Goater wrote:
> On 9/17/20 6:57 PM, Philippe Mathieu-Daudé wrote:
> > On 9/16/20 7:51 AM, Cédric Le Goater wrote:
> >> On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote:
> >>> ping?
> >>
> >> It's reviewed :
> >>
> >> http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/
> >>
> >
> > Yes I know :) This is part of my routine to check if a
> > patch hasn't been confirmed to be queued 1 week after the
> > last review, to ping the maintainer (because some
> > automatically flush patches older than 1month in their
> > mailbox).
>
> ooh. That's brutal.
>
> >> I will send a PR when I have more patches.
> >
> > Ah OK. I didn't know you would keep merging the Aspeed
> > patches. Since this was a single patch, I thought it would
> > go via the usual qemu-arm queue from Peter.
>
> sure. It could also. Fine with me. I have only three for the
> moment.
>
> > No rush, I just wanted to be sure the patch was not lost.
> > Also, once a patch is queued, I understand it is the
> > maintainer responsibility to keep rebasing the patch
> > queued.
>
> yes. I know. I have been taking care of Andrew's ADC patches
> since 2017 ... cough cough :)
Agh!
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally
2020-09-30 5:29 ` Andrew Jeffery
@ 2020-09-30 10:07 ` Cédric Le Goater
2020-10-01 0:37 ` Andrew Jeffery
0 siblings, 1 reply; 9+ messages in thread
From: Cédric Le Goater @ 2020-09-30 10:07 UTC (permalink / raw)
To: Andrew Jeffery, Philippe Mathieu-Daudé, Cameron Esfahani via
Cc: Peter Maydell, qemu-arm, Joel Stanley
On 9/30/20 7:29 AM, Andrew Jeffery wrote:
>
>
> On Fri, 18 Sep 2020, at 02:33, Cédric Le Goater wrote:
>> On 9/17/20 6:57 PM, Philippe Mathieu-Daudé wrote:
>>> On 9/16/20 7:51 AM, Cédric Le Goater wrote:
>>>> On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote:
>>>>> ping?
>>>>
>>>> It's reviewed :
>>>>
>>>> http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/
>>>>
>>>
>>> Yes I know :) This is part of my routine to check if a
>>> patch hasn't been confirmed to be queued 1 week after the
>>> last review, to ping the maintainer (because some
>>> automatically flush patches older than 1month in their
>>> mailbox).
>>
>> ooh. That's brutal.
>>
>>>> I will send a PR when I have more patches.
>>>
>>> Ah OK. I didn't know you would keep merging the Aspeed
>>> patches. Since this was a single patch, I thought it would
>>> go via the usual qemu-arm queue from Peter.
>>
>> sure. It could also. Fine with me. I have only three for the
>> moment.
>>
>>> No rush, I just wanted to be sure the patch was not lost.
>>> Also, once a patch is queued, I understand it is the
>>> maintainer responsibility to keep rebasing the patch
>>> queued.
>>
>> yes. I know. I have been taking care of Andrew's ADC patches
>> since 2017 ... cough cough :)
>
> Agh!
Does that mean "I will work on it !" ? :)
C.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally
2020-09-30 10:07 ` Cédric Le Goater
@ 2020-10-01 0:37 ` Andrew Jeffery
0 siblings, 0 replies; 9+ messages in thread
From: Andrew Jeffery @ 2020-10-01 0:37 UTC (permalink / raw)
To: Cédric Le Goater, Philippe Mathieu-Daudé,
Cameron Esfahani via
Cc: Peter Maydell, qemu-arm, Joel Stanley
On Wed, 30 Sep 2020, at 19:37, Cédric Le Goater wrote:
> On 9/30/20 7:29 AM, Andrew Jeffery wrote:
> >
> >
> > On Fri, 18 Sep 2020, at 02:33, Cédric Le Goater wrote:
> >> On 9/17/20 6:57 PM, Philippe Mathieu-Daudé wrote:
> >>> On 9/16/20 7:51 AM, Cédric Le Goater wrote:
> >>>> On 9/15/20 7:23 PM, Philippe Mathieu-Daudé wrote:
> >>>>> ping?
> >>>>
> >>>> It's reviewed :
> >>>>
> >>>> http://patchwork.ozlabs.org/project/qemu-devel/patch/20200905212415.760452-1-f4bug@amsat.org/
> >>>>
> >>>
> >>> Yes I know :) This is part of my routine to check if a
> >>> patch hasn't been confirmed to be queued 1 week after the
> >>> last review, to ping the maintainer (because some
> >>> automatically flush patches older than 1month in their
> >>> mailbox).
> >>
> >> ooh. That's brutal.
> >>
> >>>> I will send a PR when I have more patches.
> >>>
> >>> Ah OK. I didn't know you would keep merging the Aspeed
> >>> patches. Since this was a single patch, I thought it would
> >>> go via the usual qemu-arm queue from Peter.
> >>
> >> sure. It could also. Fine with me. I have only three for the
> >> moment.
> >>
> >>> No rush, I just wanted to be sure the patch was not lost.
> >>> Also, once a patch is queued, I understand it is the
> >>> maintainer responsibility to keep rebasing the patch
> >>> queued.
> >>
> >> yes. I know. I have been taking care of Andrew's ADC patches
> >> since 2017 ... cough cough :)
> >
> > Agh!
>
> Does that mean "I will work on it !" ? :)
I'll see what I can do, I've recently started to rearrange my task queue.
Andrew
^ permalink raw reply [flat|nested] 9+ messages in thread
end of thread, other threads:[~2020-10-01 0:39 UTC | newest]
Thread overview: 9+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2020-09-05 21:24 [PATCH] hw/arm/aspeed: Map the UART5 device unconditionally Philippe Mathieu-Daudé
2020-09-06 7:35 ` Cédric Le Goater
2020-09-15 17:23 ` Philippe Mathieu-Daudé
2020-09-16 5:51 ` Cédric Le Goater
2020-09-17 16:57 ` Philippe Mathieu-Daudé
2020-09-17 17:03 ` Cédric Le Goater
2020-09-30 5:29 ` Andrew Jeffery
2020-09-30 10:07 ` Cédric Le Goater
2020-10-01 0:37 ` Andrew Jeffery
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