Re: [PATCH v2 38/54] target/m68k: Convert to TCGCPUOps.tlb_fill_align

[Pierrick Bouvier <pierrick.bouvier@linaro.org>]

On 11/14/24 08:01, Richard Henderson wrote:
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   target/m68k/cpu.h    |  7 ++++---
>   target/m68k/cpu.c    |  2 +-
>   target/m68k/helper.c | 22 +++++++++++++---------
>   3 files changed, 18 insertions(+), 13 deletions(-)
> 
> diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h
> index b5bbeedb7a..4401426a0b 100644
> --- a/target/m68k/cpu.h
> +++ b/target/m68k/cpu.h
> @@ -22,6 +22,7 @@
>   #define M68K_CPU_H
>   
>   #include "exec/cpu-defs.h"
> +#include "exec/memop.h"
>   #include "qemu/cpu-float.h"
>   #include "cpu-qom.h"
>   
> @@ -582,10 +583,10 @@ enum {
>   #define MMU_KERNEL_IDX 0
>   #define MMU_USER_IDX 1
>   
> -bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> -                       MMUAccessType access_type, int mmu_idx,
> -                       bool probe, uintptr_t retaddr);
>   #ifndef CONFIG_USER_ONLY
> +bool m68k_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out, vaddr addr,
> +                             MMUAccessType access_type, int mmu_idx,
> +                             MemOp memop, int size, bool probe, uintptr_t ra);
>   void m68k_cpu_transaction_failed(CPUState *cs, hwaddr physaddr, vaddr addr,
>                                    unsigned size, MMUAccessType access_type,
>                                    int mmu_idx, MemTxAttrs attrs,
> diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c
> index 5fe335558a..5316cf8922 100644
> --- a/target/m68k/cpu.c
> +++ b/target/m68k/cpu.c
> @@ -550,7 +550,7 @@ static const TCGCPUOps m68k_tcg_ops = {
>       .restore_state_to_opc = m68k_restore_state_to_opc,
>   
>   #ifndef CONFIG_USER_ONLY
> -    .tlb_fill = m68k_cpu_tlb_fill,
> +    .tlb_fill_align = m68k_cpu_tlb_fill_align,
>       .cpu_exec_interrupt = m68k_cpu_exec_interrupt,
>       .cpu_exec_halt = m68k_cpu_has_work,
>       .do_interrupt = m68k_cpu_do_interrupt,
> diff --git a/target/m68k/helper.c b/target/m68k/helper.c
> index 9bfc6ae97c..1decb6f39c 100644
> --- a/target/m68k/helper.c
> +++ b/target/m68k/helper.c
> @@ -950,9 +950,10 @@ void m68k_set_irq_level(M68kCPU *cpu, int level, uint8_t vector)
>       }
>   }
>   
> -bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
> -                       MMUAccessType qemu_access_type, int mmu_idx,
> -                       bool probe, uintptr_t retaddr)
> +bool m68k_cpu_tlb_fill_align(CPUState *cs, CPUTLBEntryFull *out,
> +                             vaddr address, MMUAccessType qemu_access_type,
> +                             int mmu_idx, MemOp memop, int size,
> +                             bool probe, uintptr_t retaddr)
>   {
>       CPUM68KState *env = cpu_env(cs);
>       hwaddr physical;
> @@ -961,12 +962,14 @@ bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>       int ret;
>       target_ulong page_size;
>   
> +    memset(out, 0, sizeof(*out));
> +    out->attrs = MEMTXATTRS_UNSPECIFIED;
> +
>       if ((env->mmu.tcr & M68K_TCR_ENABLED) == 0) {
>           /* MMU disabled */
> -        tlb_set_page(cs, address & TARGET_PAGE_MASK,
> -                     address & TARGET_PAGE_MASK,
> -                     PAGE_READ | PAGE_WRITE | PAGE_EXEC,
> -                     mmu_idx, TARGET_PAGE_SIZE);
> +        out->phys_addr = address;
> +        out->prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
> +        out->lg_page_size = TARGET_PAGE_BITS;
>           return true;
>       }
>   
> @@ -985,8 +988,9 @@ bool m68k_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>       ret = get_physical_address(env, &physical, &prot,
>                                  address, access_type, &page_size);
>       if (likely(ret == 0)) {
> -        tlb_set_page(cs, address & TARGET_PAGE_MASK,
> -                     physical & TARGET_PAGE_MASK, prot, mmu_idx, page_size);
> +        out->phys_addr = physical;
> +        out->prot = prot;
> +        out->lg_page_size = ctz32(page_size);
>           return true;
>       }
>   

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>