From: "Michael S. Tsirkin" <mst@redhat.com>
To: qemu-devel@nongnu.org
Cc: Peter Maydell <peter.maydell@linaro.org>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Thomas Huth <thuth@redhat.com>,
Igor Mammedov <imammedo@redhat.com>,
Ani Sinha <anisinha@redhat.com>, Fan Ni <fan.ni@samsung.com>,
Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
Subject: [PULL 31/31] hw/pci-bridge: Make PCIe and CXL PXB Devices inherit from TYPE_PXB_DEV
Date: Tue, 25 Apr 2023 03:46:39 -0400 [thread overview]
Message-ID: <c28db9e0002df2abf88283b41dce0be17e8b0888.1682408661.git.mst@redhat.com> (raw)
In-Reply-To: <cover.1682408661.git.mst@redhat.com>
From: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Previously, PXB_CXL_DEVICE, PXB_PCIE_DEVICE and PXB_DEVICE all
have PCI_DEVICE as their direct parent but share a common state
struct PXBDev. convert_to_pxb() is used to get the PXBDev
instance from which ever of these types it is called on.
This patch switches to an explicit hierarchy based on shared
functionality. To allow use of OBJECT_DECLARE_SIMPLE_TYPE()
whilst minimizing code changes, all types are renamed to have
the postfix _DEV rather than _DEVICE. The new heirarchy
has PXB_CXL_DEV with parent PXB_PCIE_DEV which in turn
has parent PXB_DEV which continues to have parent PCI_DEVICE.
This allows simple use of PXB_DEV() etc rather than a custom function
+ removal of duplicated properties and moving the CXL specific
elements out of struct PXBDev.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230420142750.6950-3-Jonathan.Cameron@huawei.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
---
include/hw/cxl/cxl.h | 4 +-
include/hw/pci/pci_bridge.h | 30 ++++++++++-----
hw/acpi/cxl.c | 11 +++---
hw/cxl/cxl-host.c | 4 +-
hw/pci-bridge/pci_expander_bridge.c | 59 ++++++++++-------------------
5 files changed, 50 insertions(+), 58 deletions(-)
diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h
index b2cffbb364..c453983e83 100644
--- a/include/hw/cxl/cxl.h
+++ b/include/hw/cxl/cxl.h
@@ -23,12 +23,12 @@
#define CXL_WINDOW_MAX 10
-typedef struct PXBDev PXBDev;
+typedef struct PXBCXLDev PXBCXLDev;
typedef struct CXLFixedWindow {
uint64_t size;
char **targets;
- PXBDev *target_hbs[8];
+ PXBCXLDev *target_hbs[8];
uint8_t num_targets;
uint8_t enc_int_ways;
uint8_t enc_int_gran;
diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h
index 1677176b2a..01670e9e65 100644
--- a/include/hw/pci/pci_bridge.h
+++ b/include/hw/pci/pci_bridge.h
@@ -84,7 +84,7 @@ struct PCIBridge {
#define PCI_BRIDGE_DEV_PROP_SHPC "shpc"
typedef struct CXLHost CXLHost;
-struct PXBDev {
+typedef struct PXBDev {
/*< private >*/
PCIDevice parent_obj;
/*< public >*/
@@ -92,15 +92,27 @@ struct PXBDev {
uint8_t bus_nr;
uint16_t numa_node;
bool bypass_iommu;
- bool hdm_for_passthrough;
- struct cxl_dev {
- CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
- } cxl;
-};
+} PXBDev;
-#define TYPE_PXB_CXL_DEVICE "pxb-cxl"
-DECLARE_INSTANCE_CHECKER(PXBDev, PXB_CXL_DEV,
- TYPE_PXB_CXL_DEVICE)
+typedef struct PXBPCIEDev {
+ /*< private >*/
+ PXBDev parent_obj;
+} PXBPCIEDev;
+
+#define TYPE_PXB_DEV "pxb"
+OBJECT_DECLARE_SIMPLE_TYPE(PXBDev, PXB_DEV)
+
+typedef struct PXBCXLDev {
+ /*< private >*/
+ PXBPCIEDev parent_obj;
+ /*< public >*/
+
+ bool hdm_for_passthrough;
+ CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */
+} PXBCXLDev;
+
+#define TYPE_PXB_CXL_DEV "pxb-cxl"
+OBJECT_DECLARE_SIMPLE_TYPE(PXBCXLDev, PXB_CXL_DEV)
int pci_bridge_ssvid_init(PCIDevice *dev, uint8_t offset,
uint16_t svid, uint16_t ssid,
diff --git a/hw/acpi/cxl.c b/hw/acpi/cxl.c
index 2bf8c07993..92b46bc932 100644
--- a/hw/acpi/cxl.c
+++ b/hw/acpi/cxl.c
@@ -30,9 +30,10 @@
#include "qapi/error.h"
#include "qemu/uuid.h"
-static void cedt_build_chbs(GArray *table_data, PXBDev *cxl)
+static void cedt_build_chbs(GArray *table_data, PXBCXLDev *cxl)
{
- SysBusDevice *sbd = SYS_BUS_DEVICE(cxl->cxl.cxl_host_bridge);
+ PXBDev *pxb = PXB_DEV(cxl);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(cxl->cxl_host_bridge);
struct MemoryRegion *mr = sbd->mmio[0].memory;
/* Type */
@@ -45,7 +46,7 @@ static void cedt_build_chbs(GArray *table_data, PXBDev *cxl)
build_append_int_noprefix(table_data, 32, 2);
/* UID - currently equal to bus number */
- build_append_int_noprefix(table_data, cxl->bus_nr, 4);
+ build_append_int_noprefix(table_data, pxb->bus_nr, 4);
/* Version */
build_append_int_noprefix(table_data, 1, 4);
@@ -112,7 +113,7 @@ static void cedt_build_cfmws(GArray *table_data, CXLState *cxls)
/* Host Bridge List (list of UIDs - currently bus_nr) */
for (i = 0; i < fw->num_targets; i++) {
g_assert(fw->target_hbs[i]);
- build_append_int_noprefix(table_data, fw->target_hbs[i]->bus_nr, 4);
+ build_append_int_noprefix(table_data, PXB_DEV(fw->target_hbs[i])->bus_nr, 4);
}
}
}
@@ -121,7 +122,7 @@ static int cxl_foreach_pxb_hb(Object *obj, void *opaque)
{
Aml *cedt = opaque;
- if (object_dynamic_cast(obj, TYPE_PXB_CXL_DEVICE)) {
+ if (object_dynamic_cast(obj, TYPE_PXB_CXL_DEV)) {
cedt_build_chbs(cedt->buf, PXB_CXL_DEV(obj));
}
diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c
index 6e923ceeaf..034c7805b3 100644
--- a/hw/cxl/cxl-host.c
+++ b/hw/cxl/cxl-host.c
@@ -84,7 +84,7 @@ void cxl_fmws_link_targets(CXLState *cxl_state, Error **errp)
bool ambig;
o = object_resolve_path_type(fw->targets[i],
- TYPE_PXB_CXL_DEVICE,
+ TYPE_PXB_CXL_DEV,
&ambig);
if (!o) {
error_setg(errp, "Could not resolve CXLFM target %s",
@@ -141,7 +141,7 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw, hwaddr addr)
addr += fw->base;
rb_index = (addr / cxl_decode_ig(fw->enc_int_gran)) % fw->num_targets;
- hb = PCI_HOST_BRIDGE(fw->target_hbs[rb_index]->cxl.cxl_host_bridge);
+ hb = PCI_HOST_BRIDGE(fw->target_hbs[rb_index]->cxl_host_bridge);
if (!hb || !hb->bus || !pci_bus_is_cxl(hb->bus)) {
return NULL;
}
diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c
index a78327b5f2..613857b601 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -50,24 +50,8 @@ struct PXBBus {
char bus_path[8];
};
-#define TYPE_PXB_DEVICE "pxb"
-DECLARE_INSTANCE_CHECKER(PXBDev, PXB_DEV,
- TYPE_PXB_DEVICE)
-
-#define TYPE_PXB_PCIE_DEVICE "pxb-pcie"
-DECLARE_INSTANCE_CHECKER(PXBDev, PXB_PCIE_DEV,
- TYPE_PXB_PCIE_DEVICE)
-
-static PXBDev *convert_to_pxb(PCIDevice *dev)
-{
- /* A CXL PXB's parent bus is PCIe, so the normal check won't work */
- if (object_dynamic_cast(OBJECT(dev), TYPE_PXB_CXL_DEVICE)) {
- return PXB_CXL_DEV(dev);
- }
-
- return pci_bus_is_express(pci_get_bus(dev))
- ? PXB_PCIE_DEV(dev) : PXB_DEV(dev);
-}
+#define TYPE_PXB_PCIE_DEV "pxb-pcie"
+OBJECT_DECLARE_SIMPLE_TYPE(PXBPCIEDev, PXB_PCIE_DEV)
static GList *pxb_dev_list;
@@ -89,14 +73,14 @@ bool cxl_get_hb_passthrough(PCIHostState *hb)
static int pxb_bus_num(PCIBus *bus)
{
- PXBDev *pxb = convert_to_pxb(bus->parent_dev);
+ PXBDev *pxb = PXB_DEV(bus->parent_dev);
return pxb->bus_nr;
}
static uint16_t pxb_bus_numa_node(PCIBus *bus)
{
- PXBDev *pxb = convert_to_pxb(bus->parent_dev);
+ PXBDev *pxb = PXB_DEV(bus->parent_dev);
return pxb->numa_node;
}
@@ -154,7 +138,7 @@ static char *pxb_host_ofw_unit_address(const SysBusDevice *dev)
pxb_host = PCI_HOST_BRIDGE(dev);
pxb_bus = pxb_host->bus;
- pxb_dev = convert_to_pxb(pxb_bus->parent_dev);
+ pxb_dev = PXB_DEV(pxb_bus->parent_dev);
position = g_list_index(pxb_dev_list, pxb_dev);
assert(position >= 0);
@@ -212,8 +196,8 @@ static void pxb_cxl_realize(DeviceState *dev, Error **errp)
*/
void pxb_cxl_hook_up_registers(CXLState *cxl_state, PCIBus *bus, Error **errp)
{
- PXBDev *pxb = PXB_CXL_DEV(pci_bridge_get_device(bus));
- CXLHost *cxl = pxb->cxl.cxl_host_bridge;
+ PXBCXLDev *pxb = PXB_CXL_DEV(pci_bridge_get_device(bus));
+ CXLHost *cxl = pxb->cxl_host_bridge;
CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
struct MemoryRegion *mr = &cxl_cstate->crb.component_registers;
hwaddr offset;
@@ -299,7 +283,7 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin)
static void pxb_cxl_dev_reset(DeviceState *dev)
{
- CXLHost *cxl = PXB_CXL_DEV(dev)->cxl.cxl_host_bridge;
+ CXLHost *cxl = PXB_CXL_DEV(dev)->cxl_host_bridge;
CXLComponentState *cxl_cstate = &cxl->cxl_cstate;
PCIHostState *hb = PCI_HOST_BRIDGE(cxl);
uint32_t *reg_state = cxl_cstate->crb.cache_mem_registers;
@@ -337,7 +321,7 @@ static gint pxb_compare(gconstpointer a, gconstpointer b)
static void pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
Error **errp)
{
- PXBDev *pxb = convert_to_pxb(dev);
+ PXBDev *pxb = PXB_DEV(dev);
DeviceState *ds, *bds = NULL;
PCIBus *bus;
const char *dev_name = NULL;
@@ -365,7 +349,7 @@ static void pxb_dev_realize_common(PCIDevice *dev, enum BusType type,
} else if (type == CXL) {
bus = pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_CXL_BUS);
bus->flags |= PCI_BUS_CXL;
- PXB_CXL_DEV(dev)->cxl.cxl_host_bridge = PXB_CXL_HOST(ds);
+ PXB_CXL_DEV(dev)->cxl_host_bridge = PXB_CXL_HOST(ds);
} else {
bus = pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BUS);
bds = qdev_new("pci-bridge");
@@ -418,7 +402,7 @@ static void pxb_dev_realize(PCIDevice *dev, Error **errp)
static void pxb_dev_exitfn(PCIDevice *pci_dev)
{
- PXBDev *pxb = convert_to_pxb(pci_dev);
+ PXBDev *pxb = PXB_DEV(pci_dev);
pxb_dev_list = g_list_remove(pxb_dev_list, pxb);
}
@@ -449,7 +433,7 @@ static void pxb_dev_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo pxb_dev_info = {
- .name = TYPE_PXB_DEVICE,
+ .name = TYPE_PXB_DEV,
.parent = TYPE_PCI_DEVICE,
.instance_size = sizeof(PXBDev),
.class_init = pxb_dev_class_init,
@@ -481,15 +465,14 @@ static void pxb_pcie_dev_class_init(ObjectClass *klass, void *data)
k->class_id = PCI_CLASS_BRIDGE_HOST;
dc->desc = "PCI Express Expander Bridge";
- device_class_set_props(dc, pxb_dev_properties);
dc->hotpluggable = false;
set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
}
static const TypeInfo pxb_pcie_dev_info = {
- .name = TYPE_PXB_PCIE_DEVICE,
- .parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(PXBDev),
+ .name = TYPE_PXB_PCIE_DEV,
+ .parent = TYPE_PXB_DEV,
+ .instance_size = sizeof(PXBPCIEDev),
.class_init = pxb_pcie_dev_class_init,
.interfaces = (InterfaceInfo[]) {
{ INTERFACE_CONVENTIONAL_PCI_DEVICE },
@@ -510,11 +493,7 @@ static void pxb_cxl_dev_realize(PCIDevice *dev, Error **errp)
}
static Property pxb_cxl_dev_properties[] = {
- /* Note: 0 is not a legal PXB bus number. */
- DEFINE_PROP_UINT8("bus_nr", PXBDev, bus_nr, 0),
- DEFINE_PROP_UINT16("numa_node", PXBDev, numa_node, NUMA_NODE_UNASSIGNED),
- DEFINE_PROP_BOOL("bypass_iommu", PXBDev, bypass_iommu, false),
- DEFINE_PROP_BOOL("hdm_for_passthrough", PXBDev, hdm_for_passthrough, false),
+ DEFINE_PROP_BOOL("hdm_for_passthrough", PXBCXLDev, hdm_for_passthrough, false),
DEFINE_PROP_END_OF_LIST(),
};
@@ -540,9 +519,9 @@ static void pxb_cxl_dev_class_init(ObjectClass *klass, void *data)
}
static const TypeInfo pxb_cxl_dev_info = {
- .name = TYPE_PXB_CXL_DEVICE,
- .parent = TYPE_PCI_DEVICE,
- .instance_size = sizeof(PXBDev),
+ .name = TYPE_PXB_CXL_DEV,
+ .parent = TYPE_PXB_PCIE_DEV,
+ .instance_size = sizeof(PXBCXLDev),
.class_init = pxb_cxl_dev_class_init,
.interfaces =
(InterfaceInfo[]){
--
MST
next prev parent reply other threads:[~2023-04-25 7:50 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-25 7:44 [PULL 00/31] virtio,pc,pci: fixes, features, cleanups Michael S. Tsirkin
2023-04-25 7:44 ` [PULL 01/31] virtio: refresh vring region cache after updating a virtqueue size Michael S. Tsirkin
2023-04-26 16:32 ` Michael Tokarev
2023-04-25 7:44 ` [PULL 02/31] Add my old and new work email mapping and use work email to support biosbits Michael S. Tsirkin
2023-04-25 7:44 ` [PULL 03/31] vdpa: accept VIRTIO_NET_F_SPEED_DUPLEX in SVQ Michael S. Tsirkin
2023-04-25 7:44 ` [PULL 04/31] meson_options.txt: Enable qom-cast-debug by default again Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 05/31] vhost: Drop unused eventfd_add|del hooks Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 06/31] docs: vhost-user: Define memory region separately Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 07/31] docs: vhost-user: Add Xen specific memory mapping support Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 08/31] virtio-balloon: optimize the virtio-balloon on the ARM platform Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 09/31] MAINTAINERS: Mark AMD-Vi emulation as orphan Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 10/31] hw/i386/amd_iommu: Explicit use of AMDVI_BASE_ADDR in amdvi_init Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 11/31] hw/i386/amd_iommu: Remove intermediate AMDVIState::devid field Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 12/31] hw/i386/amd_iommu: Move capab_offset from AMDVIState to AMDVIPCIState Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 13/31] hw/i386/amd_iommu: Set PCI static/const fields via PCIDeviceClass Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 14/31] hw/i386/amd_iommu: Factor amdvi_pci_realize out of amdvi_sysbus_realize Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 15/31] hw: Add compat machines for 8.1 Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 16/31] pci: avoid accessing slot_reserved_mask directly outside of pci.c Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 17/31] vhost-user-blk-server: notify client about disk resize Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 18/31] Add my old and new work email mapping and use work email to support acpi Michael S. Tsirkin
2023-04-25 8:22 ` Ani Sinha
2023-04-25 7:45 ` [PULL 19/31] hw/acpi: limit warning on acpi table size to pc machines older than version 2.3 Michael S. Tsirkin
2023-04-25 7:45 ` [PULL 20/31] tests: bios-tables-test: replace memset with initializer Michael S. Tsirkin
2023-04-25 7:46 ` [PULL 21/31] MAINTAINERS: Add Eugenio Pérez as vhost-shadow-virtqueue reviewer Michael S. Tsirkin
2023-04-25 7:46 ` [PULL 22/31] docs/cxl: Fix sentence Michael S. Tsirkin
2023-04-25 7:46 ` [PULL 23/31] intel_iommu: refine iotlb hash calculation Michael S. Tsirkin
2023-04-25 8:04 ` Michael S. Tsirkin
2023-04-25 7:46 ` [PULL 25/31] virtio: i2c: Check notifier helpers for VIRTIO_CONFIG_IRQ_IDX Michael S. Tsirkin
2023-04-25 7:46 ` [PULL 26/31] acpi: pcihp: allow repeating hot-unplug requests Michael S. Tsirkin
2023-04-25 7:46 ` [PULL 27/31] docs/specs/pci-ids: Convert from txt to rST Michael S. Tsirkin
2023-04-25 7:46 ` [PULL 28/31] docs/specs: Convert pci-serial.txt to rst Michael S. Tsirkin
2023-04-25 7:46 ` [PULL 29/31] docs/specs: Convert pci-testdev.txt " Michael S. Tsirkin
2023-04-25 7:46 ` [PULL 30/31] hw/pci-bridge: pci_expander_bridge fix type in pxb_cxl_dev_reset() Michael S. Tsirkin
2023-04-25 7:46 ` Michael S. Tsirkin [this message]
2023-04-25 8:04 ` [PULL 24/31] docs: Remove obsolete descriptions of SR-IOV support Michael S. Tsirkin
2023-04-25 11:16 ` [PULL 00/31] virtio,pc,pci: fixes, features, cleanups Richard Henderson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=c28db9e0002df2abf88283b41dce0be17e8b0888.1682408661.git.mst@redhat.com \
--to=mst@redhat.com \
--cc=Jonathan.Cameron@huawei.com \
--cc=anisinha@redhat.com \
--cc=fan.ni@samsung.com \
--cc=imammedo@redhat.com \
--cc=marcel.apfelbaum@gmail.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=thuth@redhat.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).