From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Nikita Novikov <n.novikov@syntacore.com>, richard.henderson@linaro.org
Cc: pbonzini@redhat.com, qemu-devel@nongnu.org, qemu-riscv@nongnu.org
Subject: Re: [PATCH] accel/tcg: Pass actual memop_size to tlb_fill instead of 0
Date: Wed, 22 Oct 2025 17:24:05 +0200	[thread overview]
Message-ID: <c292db71-8f6a-4086-92af-9f2d19afecc3@linaro.org> (raw)
In-Reply-To: <20251022115213.91457-1-n.novikov@syntacore.com>
On 22/10/25 13:52, Nikita Novikov wrote:
> Recent debugging of misaligned access handling on RISC-V revealed that we
> always call `tlb_fill` with `memop_size == 0`. This behavior effectively
> disables natural alignment checks in `riscv_tlb_fill_align()`, because we
> have to fall back from `memop_size` to `size` when computing the alignment bits.
> 
> With `memop_size == 0`, misaligned cross-page stores end up reported as
> `store access fault` (AF, cause=7) instead of the expected
> `store page fault` (PF, cause=15), since the “misalign” path triggers before
> the second page translation can fault. This breaks misaligned accesses at
> page boundaries.
> 
> After switching to pass the real `l->memop` into `tlb_fill`, the cross-page
> faults are no longer mis-classified as AF.
> 
> Fixes: ec03dd972378 ("accel/tcg: Hoist first page lookup above pointer_wrap")
> 
> Signed-off-by: Nikita Novikov <n.novikov@syntacore.com>
> ---
>   accel/tcg/cputlb.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
Good catch!
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
next prev parent reply	other threads:[~2025-10-22 15:24 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-22 11:52 [PATCH] accel/tcg: Pass actual memop_size to tlb_fill instead of 0 Nikita Novikov
2025-10-22 15:24 ` Philippe Mathieu-Daudé [this message]
2025-10-22 15:32 ` Richard Henderson
2025-10-22 18:59   ` Nikita Novikov
2025-10-22 19:20     ` Richard Henderson
2025-10-23  6:38       ` Nikita Novikov
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