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From: WANG Xuerui <i.qemu@xen0n.name>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>, qemu-devel@nongnu.org
Cc: "Peter Maydell" <peter.maydell@linaro.org>,
	"XiaoJuan Yang" <yangxiaojuan@loongson.cn>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Laurent Vivier" <laurent@vivier.eu>,
	"Song Gao" <gaosong@loongson.cn>,
	"Alex Bennée" <alex.bennee@linaro.org>
Subject: Re: [PATCH v9 28/31] common-user: Add safe syscall handling for loongarch64 hosts
Date: Tue, 14 Dec 2021 23:16:45 +0800	[thread overview]
Message-ID: <c2fc44e2-3551-35e9-6cd7-39290a7b71b7@xen0n.name> (raw)
In-Reply-To: <f6218922-c386-e1bf-e1d7-9766aa4d675a@amsat.org>

Hi Philippe,

On 12/14/21 21:29, Philippe Mathieu-Daudé wrote:
> On 12/14/21 09:01, WANG Xuerui wrote:
>> Signed-off-by: WANG Xuerui <git@xen0n.name>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   .../host/loongarch64/safe-syscall.inc.S       | 81 +++++++++++++++++++
>>   1 file changed, 81 insertions(+)
>>   create mode 100644 common-user/host/loongarch64/safe-syscall.inc.S
>>
>> diff --git a/common-user/host/loongarch64/safe-syscall.inc.S b/common-user/host/loongarch64/safe-syscall.inc.S
>> new file mode 100644
>> index 0000000000..61dc6554eb
>> --- /dev/null
>> +++ b/common-user/host/loongarch64/safe-syscall.inc.S
>> @@ -0,0 +1,81 @@
>> +/*
>> + * safe-syscall.inc.S : host-specific assembly fragment
>> + * to handle signals occurring at the same time as system calls.
>> + * This is intended to be included by common-user/safe-syscall.S
>> + *
>> + * Ported to LoongArch by WANG Xuerui <git@xen0n.name>
>> + *
>> + * Based on safe-syscall.inc.S code for every other architecture,
>> + * originally written by Richard Henderson <rth@twiddle.net>
>> + * Copyright (C) 2018 Linaro, Inc.
>> + *
>> + * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> + * See the COPYING file in the top-level directory.
>> + */
>> +
>> +        .global safe_syscall_base
>> +        .global safe_syscall_start
>> +        .global safe_syscall_end
>> +        .type   safe_syscall_base, @function
>> +        .type   safe_syscall_start, @function
>> +        .type   safe_syscall_end, @function
>> +
>> +        /*
>> +         * This is the entry point for making a system call. The calling
>> +         * convention here is that of a C varargs function with the
>> +         * first argument an 'int *' to the signal_pending flag, the
>> +         * second one the system call number (as a 'long'), and all further
>> +         * arguments being syscall arguments (also 'long').
>> +         */
>> +safe_syscall_base:
>> +        .cfi_startproc
>> +        /*
>> +         * The syscall calling convention is nearly the same as C:
>> +         * we enter with a0 == &signal_pending
>> +         *               a1 == syscall number
>> +         *               a2 ... a7 == syscall arguments
>> +         *               and return the result in a0
>> +         * and the syscall instruction needs
>> +         *               a7 == syscall number
>> +         *               a0 ... a5 == syscall arguments
>> +         *               and returns the result in a0
>> +         * Shuffle everything around appropriately.
>> +         */
>> +        move    $t0, $a0        /* signal_pending pointer */
>> +        move    $t1, $a1        /* syscall number */
>> +        move    $a0, $a2        /* syscall arguments */
>> +        move    $a1, $a3
>> +        move    $a2, $a4
>> +        move    $a3, $a5
>> +        move    $a4, $a6
>> +        move    $a5, $a7
>> +        move    $a7, $t1
>> +
>> +        /*
>> +         * This next sequence of code works in conjunction with the
>> +         * rewind_if_safe_syscall_function(). If a signal is taken
>> +         * and the interrupted PC is anywhere between 'safe_syscall_start'
>> +         * and 'safe_syscall_end' then we rewind it to 'safe_syscall_start'.
>> +         * The code sequence must therefore be able to cope with this, and
>> +         * the syscall instruction must be the final one in the sequence.
>> +         */
>> +safe_syscall_start:
>> +        /* If signal_pending is non-zero, don't do the call */
>> +        ld.w    $t1, $t0, 0
>> +        bnez    $t1, 2f
>> +        syscall 0
>> +safe_syscall_end:
>> +        /* code path for having successfully executed the syscall */
>> +        li.w    $t2, -4096
>> +        bgtu    $a0, $t2, 0f
>> +        jr      $ra
>> +
>> +        /* code path setting errno */
>> +0:      sub.d   $a0, $zero, $a0
>> +        b       safe_syscall_set_errno_tail
>> +
>> +        /* code path when we didn't execute the syscall */
>> +2:      li.w    $a0, QEMU_ERESTARTSYS
>> +        b       safe_syscall_set_errno_tail
>> +        .cfi_endproc
>> +        .size   safe_syscall_base, .-safe_syscall_base
>>
> Why not rename 0 -> set_errno and 2 -> syscall_not_executed
> for readability? (and eventually drop the comments).
This is directly taken from the RISC-V version; aside from that, this is 
similar to all other architectures' adaptation, so maybe a future 
refactor should touch all these other files as well, if we do? I 
personally find the readability to be good, because when you look up 0 
or 2 below you can't miss the comments placed close to the labels.
>
> Otherwise:
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>


  reply	other threads:[~2021-12-14 15:17 UTC|newest]

Thread overview: 41+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-14  8:01 [PATCH v9 00/31] LoongArch64 port of QEMU TCG WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 01/31] elf: Add machine type value for LoongArch WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 02/31] MAINTAINERS: Add tcg/loongarch64 entry with myself as maintainer WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 03/31] tcg/loongarch64: Add the tcg-target.h file WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 04/31] tcg/loongarch64: Add generated instruction opcodes and encoding helpers WANG Xuerui
2021-12-14 13:16   ` Philippe Mathieu-Daudé
2021-12-14  8:01 ` [PATCH v9 05/31] tcg/loongarch64: Add register names, allocation order and input/output sets WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 06/31] tcg/loongarch64: Define the operand constraints WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 07/31] tcg/loongarch64: Implement necessary relocation operations WANG Xuerui
2021-12-14 13:19   ` Philippe Mathieu-Daudé
2021-12-14  8:01 ` [PATCH v9 08/31] tcg/loongarch64: Implement the memory barrier op WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 09/31] tcg/loongarch64: Implement tcg_out_mov and tcg_out_movi WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 10/31] tcg/loongarch64: Implement goto_ptr WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 11/31] tcg/loongarch64: Implement sign-/zero-extension ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 12/31] tcg/loongarch64: Implement not/and/or/xor/nor/andc/orc ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 13/31] tcg/loongarch64: Implement deposit/extract ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 14/31] tcg/loongarch64: Implement bswap{16,32,64} ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 15/31] tcg/loongarch64: Implement clz/ctz ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 16/31] tcg/loongarch64: Implement shl/shr/sar/rotl/rotr ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 17/31] tcg/loongarch64: Implement add/sub ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 18/31] tcg/loongarch64: Implement mul/mulsh/muluh/div/divu/rem/remu ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 19/31] tcg/loongarch64: Implement br/brcond ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 20/31] tcg/loongarch64: Implement setcond ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 21/31] tcg/loongarch64: Implement tcg_out_call WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 22/31] tcg/loongarch64: Implement simple load/store ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 23/31] tcg/loongarch64: Add softmmu load/store helpers, implement qemu_ld/qemu_st ops WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 24/31] tcg/loongarch64: Implement tcg_target_qemu_prologue WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 25/31] tcg/loongarch64: Implement exit_tb/goto_tb WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 26/31] tcg/loongarch64: Implement tcg_target_init WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 27/31] tcg/loongarch64: Register the JIT WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 28/31] common-user: Add safe syscall handling for loongarch64 hosts WANG Xuerui
2021-12-14 13:29   ` Philippe Mathieu-Daudé
2021-12-14 15:16     ` WANG Xuerui [this message]
2021-12-14 15:38       ` Philippe Mathieu-Daudé
2021-12-14 19:29   ` Richard Henderson
2021-12-14 20:49     ` Peter Maydell
2021-12-15 12:57     ` WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 29/31] linux-user: Implement CPU-specific signal handler " WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 30/31] configure, meson.build: Mark support " WANG Xuerui
2021-12-14  8:01 ` [PATCH v9 31/31] tests/docker: Add gentoo-loongarch64-cross image and run cross builds in GitLab WANG Xuerui
2021-12-14 13:23   ` Philippe Mathieu-Daudé

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