Re: [PATCH] qemu-palcode: Changes to support booting NetBSD/alpha

[Richard Henderson <richard.henderson@linaro.org>]

On 10/6/20 7:52 PM, Jason Thorpe wrote:
> There are additional changes in Qemu itself.  Those will be sent as
> a follow-up.
> 
> - Change the $a2 value at VM start from "cpu count" to "config word".  Bits
>   0-5 are cpu count, and bit 6 communicates the "-nographic" option from
>   the VM.
> - Provide a Console Terminal Block in the HWRPB.  Initialize this based on
>   the location of the PCI VGA, or to the serial port if Qemu has been run
>   with "-nographic".
> - Initialize hwrpb.hwrpb.cpuid correctly; it's the WHAMI of the primary CPU,
>   not the CPU type.
> - Don't set the "PALcode memory valid" bit in the PCS flags field; those
>   HWRPB fields are not, in fact, valid.
> - Allow swppal() to specify the new $pv value.  Use this to pass the
>   CPU_Restart_data to the cpu spinup entry point.
> - Fix a bug in PCI address configuration that caused the CMD646 IDE registers
>   to be mapped incorrectly.
> - When configuring the PCI bus, program system-specific interrupt routing
>   information into the PCI device "line" register (as SRM does).
> - When building the PALcode, don't include outside header files; put everything
>   that's needed in protos.h.

I'm certainly open to these changes.  But it'll need to be split up -- one
patch per bullet, basically.


r~