From: "Philippe Mathieu-Daudé" <philmd@linaro.org>
To: Bernhard Beschow <shentey@gmail.com>,
qemu-devel@nongnu.org,
Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,
Eduardo Habkost <eduardo@habkost.net>
Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>,
Igor Mammedov <imammedo@redhat.com>, Ani Sinha <ani@anisinha.ca>,
"Michael S. Tsirkin" <mst@redhat.com>,
Aurelien Jarno <aurelien@aurel32.net>
Subject: Re: [PATCH 3/7] hw/acpi/{ich9,piix4}: Resolve redundant io_base address attributes
Date: Mon, 23 Jan 2023 08:57:08 +0100 [thread overview]
Message-ID: <c38c9c94-b629-0cdd-acd9-ac800ff9da8d@linaro.org> (raw)
In-Reply-To: <20230122170724.21868-4-shentey@gmail.com>
Hi Bernhard,
On 22/1/23 18:07, Bernhard Beschow wrote:
> A MemoryRegion has an addr attribute which gets set to the same values
> as the redundant io_addr attributes.
>
> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
> ---
> include/hw/acpi/ich9.h | 1 -
> include/hw/acpi/piix4.h | 2 --
> hw/acpi/ich9.c | 17 ++++++++---------
> hw/acpi/piix4.c | 11 ++++++-----
> 4 files changed, 14 insertions(+), 17 deletions(-)
> diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c
> index 370b34eacf..2e9bc63fca 100644
> --- a/hw/acpi/piix4.c
> +++ b/hw/acpi/piix4.c
> @@ -91,13 +91,14 @@ static void apm_ctrl_changed(uint32_t val, void *arg)
> static void pm_io_space_update(PIIX4PMState *s)
> {
> PCIDevice *d = PCI_DEVICE(s);
> + uint32_t io_base;
>
> - s->io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x40));
> - s->io_base &= 0xffc0;
> + io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x40));
> + io_base &= 0xffc0;
>
> memory_region_transaction_begin();
> memory_region_set_enabled(&s->io, d->config[0x80] & 1);
> - memory_region_set_address(&s->io, s->io_base);
> + memory_region_set_address(&s->io, io_base);
OK for this part.
> memory_region_transaction_commit();
> }
>
> @@ -433,8 +434,8 @@ static void piix4_pm_add_properties(PIIX4PMState *s)
> &s->ar.gpe.len, OBJ_PROP_FLAG_READ);
> object_property_add_uint16_ptr(OBJECT(s), ACPI_PM_PROP_SCI_INT,
> &sci_int, OBJ_PROP_FLAG_READ);
> - object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_PM_IO_BASE,
> - &s->io_base, OBJ_PROP_FLAG_READ);
> + object_property_add_uint64_ptr(OBJECT(s), ACPI_PM_PROP_PM_IO_BASE,
> + &s->io.addr, OBJ_PROP_FLAG_READ);
+Eduardo/Mark
We shouldn't do that IMO, because we access an internal field from
another QOM object.
We can however alias the MR property:
object_property_add_alias(OBJECT(s), ACPI_PM_PROP_PM_IO_BASE,
OBJECT(&s->io), "addr");
> }
next prev parent reply other threads:[~2023-01-23 7:57 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-22 17:07 [PATCH 0/7] ACPI controller cleanup Bernhard Beschow
2023-01-22 17:07 ` [PATCH 1/7] hw/acpi/{ich9, piix4}: Reuse existing attributes for QOM properties Bernhard Beschow
2023-01-24 16:48 ` [PATCH 1/7] hw/acpi/{ich9,piix4}: " Igor Mammedov
2023-01-22 17:07 ` [PATCH 2/7] hw/acpi/ich9: Remove unneeded assignments Bernhard Beschow
2023-01-24 16:55 ` Igor Mammedov
2023-01-29 14:48 ` Bernhard Beschow
2023-01-22 17:07 ` [PATCH 3/7] hw/acpi/{ich9, piix4}: Resolve redundant io_base address attributes Bernhard Beschow
2023-01-23 7:57 ` Philippe Mathieu-Daudé [this message]
2023-01-23 15:49 ` [PATCH 3/7] hw/acpi/{ich9,piix4}: " Bernhard Beschow
2023-01-24 16:05 ` Igor Mammedov
2023-01-29 15:19 ` Bernhard Beschow
2023-01-22 17:07 ` [PATCH 4/7] hw/acpi/ich9: Use ICH9_PMIO_GPE0_STS just once Bernhard Beschow
2023-01-24 17:18 ` Igor Mammedov
2023-01-22 17:07 ` [PATCH 5/7] hw/acpi/piix4: Fix offset of GPE0 registers Bernhard Beschow
2023-01-25 15:55 ` Igor Mammedov
2023-01-29 14:55 ` Bernhard Beschow
2023-03-02 14:31 ` Igor Mammedov
2023-01-22 17:07 ` [PATCH 6/7] hw/acpi: Trace GPE access in all device models, not just PIIX4 Bernhard Beschow
2023-01-23 7:59 ` Philippe Mathieu-Daudé
2023-01-25 16:08 ` Igor Mammedov
2023-01-22 17:07 ` [PATCH 7/7] hw/acpi/core: Trace enable and status registers of GPE separately Bernhard Beschow
2023-01-25 16:17 ` Igor Mammedov
2023-01-25 16:53 ` [PATCH 0/7] ACPI controller cleanup Igor Mammedov
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