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From: Paolo Bonzini <pbonzini@redhat.com>
To: Vitaly Kuznetsov <vkuznets@redhat.com>, qemu-devel@nongnu.org
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Subject: Re: [PATCH 2/2] vmxcap: Add 5-level EPT bit
Date: Wed, 23 Feb 2022 10:47:47 +0100	[thread overview]
Message-ID: <c3bffd7c-0f03-b843-befc-d22b83bb010e@redhat.com> (raw)
In-Reply-To: <20220221145316.576138-2-vkuznets@redhat.com>

On 2/21/22 15:53, Vitaly Kuznetsov wrote:
> 5-level EPT is present in Icelake Server CPUs and is supported by QEMU
> ('vmx-page-walk-5').
> 
> Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
> ---
>   scripts/kvm/vmxcap | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
> index 6fe66d5f5753..f140040104bf 100755
> --- a/scripts/kvm/vmxcap
> +++ b/scripts/kvm/vmxcap
> @@ -249,6 +249,7 @@ controls = [
>           bits = {
>               0: 'Execute-only EPT translations',
>               6: 'Page-walk length 4',
> +            7: 'Page-walk length 5',
>               8: 'Paging-structure memory type UC',
>               14: 'Paging-structure memory type WB',
>               16: '2MB EPT pages',

Queued both, thanks.

Paolo


      reply	other threads:[~2022-02-23 10:34 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-21 14:53 [PATCH 1/2] i386: Add Icelake-Server-v6 CPU model with 5-level EPT support Vitaly Kuznetsov
2022-02-21 14:53 ` [PATCH 2/2] vmxcap: Add 5-level EPT bit Vitaly Kuznetsov
2022-02-23  9:47   ` Paolo Bonzini [this message]

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