[PATCH 1/2] i386: Add Icelake-Server-v6 CPU model with 5-level EPT support

[PATCH 1/2] i386: Add Icelake-Server-v6 CPU model with 5-level EPT support

[Vitaly Kuznetsov]

Windows 11 with WSL2 enabled (Hyper-V) fails to boot with Icelake-Server
{-v5} CPU model but boots well with '-cpu host'. Apparently, it expects
5-level paging and 5-level EPT support to come in pair but QEMU's
Icelake-Server CPU model lacks the later. Introduce 'Icelake-Server-v6'
CPU model with 'vmx-page-walk-5' enabled by default.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
---
 target/i386/cpu.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index aa9e6368004c..6e25d1333971 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3505,6 +3505,14 @@ static const X86CPUDefinition builtin_x86_defs[] = {
                     { /* end of list */ }
                 },
             },
+            {
+                .version = 6,
+                .note = "5-level EPT",
+                .props = (PropValue[]) {
+                    { "vmx-page-walk-5", "on" },
+                    { /* end of list */ }
+                },
+            },
             { /* end of list */ }
         }
     },
-- 
2.35.1

[PATCH 2/2] vmxcap: Add 5-level EPT bit

[Vitaly Kuznetsov]

5-level EPT is present in Icelake Server CPUs and is supported by QEMU
('vmx-page-walk-5').

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
---
 scripts/kvm/vmxcap | 1 +
 1 file changed, 1 insertion(+)

diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
index 6fe66d5f5753..f140040104bf 100755
--- a/scripts/kvm/vmxcap
+++ b/scripts/kvm/vmxcap
@@ -249,6 +249,7 @@ controls = [
         bits = {
             0: 'Execute-only EPT translations',
             6: 'Page-walk length 4',
+            7: 'Page-walk length 5',
             8: 'Paging-structure memory type UC',
             14: 'Paging-structure memory type WB',
             16: '2MB EPT pages',
-- 
2.35.1

Re: [PATCH 2/2] vmxcap: Add 5-level EPT bit

[Paolo Bonzini]

On 2/21/22 15:53, Vitaly Kuznetsov wrote:
> 5-level EPT is present in Icelake Server CPUs and is supported by QEMU
> ('vmx-page-walk-5').
> 
> Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
> ---
>   scripts/kvm/vmxcap | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
> index 6fe66d5f5753..f140040104bf 100755
> --- a/scripts/kvm/vmxcap
> +++ b/scripts/kvm/vmxcap
> @@ -249,6 +249,7 @@ controls = [
>           bits = {
>               0: 'Execute-only EPT translations',
>               6: 'Page-walk length 4',
> +            7: 'Page-walk length 5',
>               8: 'Paging-structure memory type UC',
>               14: 'Paging-structure memory type WB',
>               16: '2MB EPT pages',

Queued both, thanks.

Paolo