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From: Richard Henderson <richard.henderson@linaro.org>
To: "Philippe Mathieu-Daudé" <philmd@linaro.org>, qemu-devel@nongnu.org
Cc: zhiwei_liu@linux.alibaba.com, tangtiancheng.ttc@alibaba-inc.com,
	liwei1518@gmail.com, bmeng.cn@gmail.com, qemu-stable@nongnu.org
Subject: Re: [PATCH 01/12] tcg: Fix iteration step in 32-bit gvec operation
Date: Tue, 10 Sep 2024 07:46:42 -0700	[thread overview]
Message-ID: <c3c21cac-2a8b-4890-9db6-98947eb2d034@linaro.org> (raw)
In-Reply-To: <a831998e-0845-4270-8f76-811c8eec2c4c@linaro.org>

On 9/9/24 23:57, Philippe Mathieu-Daudé wrote:
> On 8/9/24 04:26, Richard Henderson wrote:
>> From: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
>>
>> The loop in the 32-bit case of the vector compare operation
>> was incorrectly incrementing by 8 bytes per iteration instead
>> of 4 bytes. This caused the function to process only half of
>> the intended elements.
>>
>> Cc: qemu-stable@nongnu.org
>> Fixes: 9622c697d1 (tcg: Add gvec compare with immediate and scalar operand)
>> Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
>> Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
>> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>> Message-ID: <20240904142739.854-2-zhiwei_liu@linux.alibaba.com>
>> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
>> ---
>>   tcg/tcg-op-gvec.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/tcg/tcg-op-gvec.c b/tcg/tcg-op-gvec.c
>> index 0308732d9b..78ee1ced80 100644
>> --- a/tcg/tcg-op-gvec.c
>> +++ b/tcg/tcg-op-gvec.c
>> @@ -3939,7 +3939,7 @@ void tcg_gen_gvec_cmps(TCGCond cond, unsigned vece, uint32_t dofs,
>>           uint32_t i;
>>           tcg_gen_extrl_i64_i32(t1, c);
>> -        for (i = 0; i < oprsz; i += 8) {
>> +        for (i = 0; i < oprsz; i += 4) {
> 
> Maybe using memop_size(vece) would have been safer to avoid copy/paste bugs?

No, vece can be smaller than 4 here.

r~

> 
> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> 
>>               tcg_gen_ld_i32(t0, tcg_env, aofs + i);
>>               tcg_gen_negsetcond_i32(cond, t0, t0, t1);
>>               tcg_gen_st_i32(t0, tcg_env, dofs + i);
> 



  reply	other threads:[~2024-09-10 14:46 UTC|newest]

Thread overview: 20+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-08  2:26 [PATCH 00/12] tcg: Improve support for cmpsel_vec Richard Henderson
2024-09-08  2:26 ` [PATCH 01/12] tcg: Fix iteration step in 32-bit gvec operation Richard Henderson
2024-09-10  6:57   ` Philippe Mathieu-Daudé
2024-09-10 14:46     ` Richard Henderson [this message]
2024-09-08  2:26 ` [PATCH 02/12] tcg: Export vec_gen_6 Richard Henderson
2024-09-10  6:57   ` Philippe Mathieu-Daudé
2024-09-08  2:26 ` [PATCH 03/12] tcg/i386: Split out tcg_out_vex_modrm_type Richard Henderson
2024-09-10  6:59   ` Philippe Mathieu-Daudé
2024-09-08  2:26 ` [PATCH 04/12] tcg/i386: Do not expand cmp_vec early Richard Henderson
2024-09-08  2:26 ` [PATCH 05/12] tcg/i386: Do not expand cmpsel_vec early Richard Henderson
2024-09-08  2:26 ` [PATCH 06/12] tcg/optimize: Fold movcond with true and false values identical Richard Henderson
2024-09-10  7:00   ` Philippe Mathieu-Daudé
2024-09-08  2:26 ` [PATCH 07/12] tcg/optimize: Optimize cmp_vec and cmpsel_vec Richard Henderson
2024-09-08  2:26 ` [PATCH 08/12] tcg/optimize: Optimize bitsel_vec Richard Henderson
2024-09-08  2:26 ` [PATCH 09/12] tcg/i386: Optimize cmpsel with constant 0 arguments Richard Henderson
2024-09-08  2:26 ` [PATCH 10/12] tcg/i386: Implement cmp_vec with avx512 insns Richard Henderson
2024-09-08  2:26 ` [PATCH 11/12] tcg/i386: Add predicate parameters to tcg_out_evex_opc Richard Henderson
2024-09-10  7:04   ` Philippe Mathieu-Daudé
2024-09-08  2:26 ` [PATCH 12/12] tcg/i386: Implement cmpsel_vec with avx512 insns Richard Henderson
2024-09-09 23:37 ` [PATCH 00/12] tcg: Improve support for cmpsel_vec Richard Henderson

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