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Fri, 20 Aug 2021 10:20:01 -0700 (PDT) Received: from [192.168.3.43] ([173.197.107.15]) by smtp.gmail.com with ESMTPSA id s22sm7236018pfu.52.2021.08.20.10.20.00 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 20 Aug 2021 10:20:01 -0700 (PDT) Subject: Re: [PATCH v3 06/14] tcg/arm: Support unaligned access for softmmu To: Peter Maydell References: <20210818212912.396794-1-richard.henderson@linaro.org> <20210818212912.396794-7-richard.henderson@linaro.org> From: Richard Henderson Message-ID: Date: Fri, 20 Aug 2021 07:19:58 -1000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::433; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x433.google.com X-Spam_score_int: -35 X-Spam_score: -3.6 X-Spam_bar: --- X-Spam_report: (-3.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-1.49, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: QEMU Developers Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 8/20/21 3:34 AM, Peter Maydell wrote: > On Wed, 18 Aug 2021 at 22:32, Richard Henderson > wrote: >> >> From armv6, the architecture supports unaligned accesses. >> All we need to do is perform the correct alignment check >> in tcg_out_tlb_read and not use LDRD/STRD when the access >> is not aligned. >> >> Signed-off-by: Richard Henderson >> @@ -1578,27 +1576,32 @@ static TCGReg tcg_out_tlb_read(TCGContext *s, TCGReg addrlo, TCGReg addrhi, >> >> /* >> * Check alignment, check comparators. >> - * Do this in no more than 3 insns. Use MOVW for v7, if possible, >> + * Do this in 2-4 insns. Use MOVW for v7, if possible, >> * to reduce the number of sequential conditional instructions. >> * Almost all guests have at least 4k pages, which means that we need >> * to clear at least 9 bits even for an 8-byte memory, which means it >> * isn't worth checking for an immediate operand for BIC. >> */ >> + /* For unaligned accesses, test the page of the last byte. */ >> + t_addr = addrlo; >> + if (a_mask < s_mask) { >> + t_addr = TCG_REG_R0; >> + tcg_out_dat_imm(s, COND_AL, ARITH_ADD, t_addr, >> + addrlo, s_mask - a_mask); >> + } > > I don't understand what this comment means or why we're doing the > addition. If we know we need to check eg whether the address is 2-aligned, > why aren't we just checking whether it's 2-aligned ? Could you > expand on the explanation a bit? We want to detect the page crossing case of a misaligned access. We began computing the softtlb data with the address of the start access (addrlo). We then compute the address of the last (aligned) portion of the access. For a 4-byte access that is 1-byte aligned, we add 3 - 0 = 3, finding the last byte; for a 2-byte aligned access we add 3 - 1 = 2; for a 4-byte aligned access we (logically) add 3 - 3 = 0. This second quantity retains the alignment we need to test and also rolls over to the next page iff the access does. When we compare against the comparator in the tlb, a bit set within the alignment will cause failure as will a differing page number. r~