Re: [PATCH] target/avr: fix long address calculation

[Richard Henderson <richard.henderson@linaro.org>]

On 11/17/22 08:11, Pavel Dovgalyuk wrote:
> AVR ELPMX instruction (and some others) use three registers to
> form long 24-bit address from RAMPZ and two 8-bit registers.
> RAMPZ stores shifted 8 bits like ff0000 to simplify address calculation.
> This patch fixes full address calculation in function gen_get_addr
> by changing the mess in offsets of deposit tcg instructions.
> 
> Signed-off-by: Pavel Dovgalyuk <Pavel.Dovgalyuk@ispras.ru>


Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~

> ---
>   target/avr/translate.c |    4 ++--
>   1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/target/avr/translate.c b/target/avr/translate.c
> index e65b6008c0..c9a0a39c2d 100644
> --- a/target/avr/translate.c
> +++ b/target/avr/translate.c
> @@ -1572,8 +1572,8 @@ static TCGv gen_get_addr(TCGv H, TCGv M, TCGv L)
>   {
>       TCGv addr = tcg_temp_new_i32();
>   
> -    tcg_gen_deposit_tl(addr, M, H, 8, 8);
> -    tcg_gen_deposit_tl(addr, L, addr, 8, 16);
> +    tcg_gen_deposit_tl(addr, H, M, 8, 8);
> +    tcg_gen_deposit_tl(addr, addr, L, 0, 8);
>   
>       return addr;
>   }
> 
>