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From: Eric Auger <eric.auger@redhat.com>
To: Zhenzhong Duan <zhenzhong.duan@intel.com>, qemu-devel@nongnu.org
Cc: alex.williamson@redhat.com, clg@redhat.com, mst@redhat.com,
	jasowang@redhat.com, peterx@redhat.com, ddutile@redhat.com,
	jgg@nvidia.com, nicolinc@nvidia.com, joao.m.martins@oracle.com,
	clement.mathieu--drif@eviden.com, kevin.tian@intel.com,
	yi.l.liu@intel.com, chao.p.peng@intel.com,
	Yi Sun <yi.y.sun@linux.intel.com>
Subject: Re: [PATCH v5 13/21] intel_iommu: Introduce a new pasid cache invalidation type FORCE_RESET
Date: Wed, 27 Aug 2025 18:28:53 +0200	[thread overview]
Message-ID: <c53b7bc6-fe76-4357-9eba-56f4c3111fa9@redhat.com> (raw)
In-Reply-To: <20250822064101.123526-14-zhenzhong.duan@intel.com>

Hi Zhenzhong,

On 8/22/25 8:40 AM, Zhenzhong Duan wrote:
> FORCE_RESET is different from GLOBAL_INV which updates pasid cache if
> underlying pasid entry is still valid, it drops all the pasid caches.
>
> FORCE_RESET isn't a VTD spec defined invalidation type for pasid cache,
> only used internally in system level reset.
>
> Signed-off-by: Yi Liu <yi.l.liu@intel.com>
> Signed-off-by: Yi Sun <yi.y.sun@linux.intel.com>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
> ---
>  hw/i386/intel_iommu_internal.h |  9 +++++++++
>  hw/i386/intel_iommu.c          | 25 +++++++++++++++++++++++++
>  hw/i386/trace-events           |  1 +
>  3 files changed, 35 insertions(+)
>
> diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h
> index fb2a919e87..c510b09d1a 100644
> --- a/hw/i386/intel_iommu_internal.h
> +++ b/hw/i386/intel_iommu_internal.h
> @@ -569,6 +569,15 @@ typedef enum VTDPCInvType {
>      VTD_PASID_CACHE_DOMSI = VTD_INV_DESC_PASIDC_G_DSI,
>      VTD_PASID_CACHE_PASIDSI = VTD_INV_DESC_PASIDC_G_PASID_SI,
>      VTD_PASID_CACHE_GLOBAL_INV = VTD_INV_DESC_PASIDC_G_GLOBAL,
> +
> +    /*
> +     * Internally used PASID cache invalidation type starts here,
> +     * 0x10 is large enough as invalidation type in pc_inv_desc
> +     * is 2bits in size.
> +     */
> +
> +    /* Reset all PASID cache entries, used in system level reset */
> +    VTD_PASID_CACHE_FORCE_RESET = 0x10,
I am not very keen on adding such an artifical enum value that does not
exist in the spec.

Why not simply introduce another function (instead of
vtd_flush_pasid_locked) that does the cleanup. To me it would be
cleaner. Thanks Eric
>  } VTDPCInvType;
>  
>  typedef struct VTDPASIDCacheInfo {
> diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> index 7d2c9feae7..af384ce7f0 100644
> --- a/hw/i386/intel_iommu.c
> +++ b/hw/i386/intel_iommu.c
> @@ -87,6 +87,8 @@ struct vtd_iotlb_key {
>  static void vtd_address_space_refresh_all(IntelIOMMUState *s);
>  static void vtd_address_space_unmap(VTDAddressSpace *as, IOMMUNotifier *n);
>  
> +static void vtd_pasid_cache_reset_locked(IntelIOMMUState *s);
> +
>  static void vtd_panic_require_caching_mode(void)
>  {
>      error_report("We need to set caching-mode=on for intel-iommu to enable "
> @@ -391,6 +393,7 @@ static void vtd_reset_caches(IntelIOMMUState *s)
>      vtd_iommu_lock(s);
>      vtd_reset_iotlb_locked(s);
>      vtd_reset_context_cache_locked(s);
> +    vtd_pasid_cache_reset_locked(s);
>      vtd_iommu_unlock(s);
>  }
>  
> @@ -3183,6 +3186,8 @@ static gboolean vtd_flush_pasid_locked(gpointer key, gpointer value,
>          /* fall through */
>      case VTD_PASID_CACHE_GLOBAL_INV:
>          break;
> +    case VTD_PASID_CACHE_FORCE_RESET:
> +        goto remove;
>      default:
>          error_setg(&error_fatal, "invalid pc_info->type for flush");
>      }
> @@ -3225,6 +3230,23 @@ remove:
>      return true;
>  }
>  
> +static void vtd_pasid_cache_reset_locked(IntelIOMMUState *s)
> +{
> +    VTDPASIDCacheInfo pc_info;
> +
> +    trace_vtd_pasid_cache_reset();
> +
> +    pc_info.type = VTD_PASID_CACHE_FORCE_RESET;
> +
> +    /*
> +     * Reset pasid cache is a big hammer, so use g_hash_table_foreach_remove
> +     * which will free all vtd_as instances except those created for PCI
> +     * sub-system.
> +     */
> +    g_hash_table_foreach_remove(s->vtd_address_spaces,
> +                                vtd_flush_pasid_locked, &pc_info);
> +}
> +
>  /*
>   * This function walks over PASID range within [start, end) in a single
>   * PASID table for entries matching @info type/did, then retrieve/create
> @@ -3363,6 +3385,9 @@ static void vtd_replay_guest_pasid_bindings(IntelIOMMUState *s,
>      case VTD_PASID_CACHE_GLOBAL_INV:
>          /* loop all assigned devices */
>          break;
> +    case VTD_PASID_CACHE_FORCE_RESET:
> +        /* For force reset, no need to go further replay */
> +        return;
>      default:
>          error_setg(&error_fatal, "invalid pc_info->type for replay");
>      }
> diff --git a/hw/i386/trace-events b/hw/i386/trace-events
> index ae5bbfcdc0..c8a936eb46 100644
> --- a/hw/i386/trace-events
> +++ b/hw/i386/trace-events
> @@ -24,6 +24,7 @@ vtd_inv_qi_head(uint16_t head) "read head %d"
>  vtd_inv_qi_tail(uint16_t head) "write tail %d"
>  vtd_inv_qi_fetch(void) ""
>  vtd_context_cache_reset(void) ""
> +vtd_pasid_cache_reset(void) ""
>  vtd_pasid_cache_gsi(void) ""
>  vtd_pasid_cache_dsi(uint16_t domain) "Domain selective PC invalidation domain 0x%"PRIx16
>  vtd_pasid_cache_psi(uint16_t domain, uint32_t pasid) "PASID selective PC invalidation domain 0x%"PRIx16" pasid 0x%"PRIx32



  reply	other threads:[~2025-08-27 16:30 UTC|newest]

Thread overview: 113+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-08-22  6:40 [PATCH v5 00/21] intel_iommu: Enable stage-1 translation for passthrough device Zhenzhong Duan
2025-08-22  6:40 ` [PATCH v5 01/21] intel_iommu: Rename vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry Zhenzhong Duan
2025-08-22 22:19   ` Nicolin Chen via
2025-08-25  6:01     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 02/21] hw/pci: Introduce pci_device_get_viommu_cap() Zhenzhong Duan
2025-08-22 22:22   ` Nicolin Chen
2025-08-27 11:13   ` Yi Liu
2025-08-27 11:22     ` Eric Auger
2025-08-27 12:30       ` Yi Liu
2025-08-27 12:32         ` Eric Auger
2025-08-27 15:30           ` Nicolin Chen
2025-08-28  8:26             ` Yi Liu
2025-08-28  9:06               ` Duan, Zhenzhong
2025-08-29  1:54                 ` Duan, Zhenzhong
2025-08-29  3:26                   ` Nicolin Chen
2025-09-01  2:35                     ` Duan, Zhenzhong
2025-09-01  2:59                       ` Nicolin Chen
2025-09-01  3:31                         ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 03/21] intel_iommu: Implement get_viommu_cap() callback Zhenzhong Duan
2025-08-22 22:23   ` Nicolin Chen
2025-08-22  6:40 ` [PATCH v5 04/21] vfio: Introduce helper vfio_pci_from_vfio_device() Zhenzhong Duan
2025-08-22 22:40   ` Nicolin Chen via
2025-08-25  6:06     ` Duan, Zhenzhong
2025-08-27 11:13   ` Yi Liu
2025-08-27 11:34   ` Eric Auger
2025-09-01 16:36   ` Cédric Le Goater
2025-09-02  2:12     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 05/21] vfio/iommufd: Force creating nested parent domain Zhenzhong Duan
2025-08-22 23:12   ` Nicolin Chen
2025-08-25  8:28     ` Duan, Zhenzhong
2025-08-27 11:51       ` Eric Auger
2025-08-27 11:48   ` Eric Auger
2025-08-28  9:53     ` Duan, Zhenzhong
2025-08-28 13:00       ` Eric Auger
2025-08-29  1:40         ` Duan, Zhenzhong
2025-08-29  3:47           ` Nicolin Chen
2025-08-22  6:40 ` [PATCH v5 06/21] hw/pci: Export pci_device_get_iommu_bus_devfn() and return bool Zhenzhong Duan
2025-08-22 23:13   ` Nicolin Chen
2025-08-27 11:14   ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 07/21] intel_iommu: Introduce a new structure VTDHostIOMMUDevice Zhenzhong Duan
2025-08-22 23:17   ` Nicolin Chen
2025-08-26 17:21   ` Nicolin Chen
2025-08-27  6:45     ` Duan, Zhenzhong
2025-08-27  8:51       ` Nicolin Chen
2025-08-27 16:36     ` Eric Auger
2025-08-27 16:57       ` Nicolin Chen
2025-08-27 11:14   ` Yi Liu
2025-08-28  9:17     ` Duan, Zhenzhong
2025-08-29  2:57       ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 08/21] intel_iommu: Check for compatibility with IOMMUFD backed device when x-flts=on Zhenzhong Duan
2025-08-27 11:42   ` Yi Liu
2025-08-28  9:37     ` Duan, Zhenzhong
2025-08-27 11:55   ` Eric Auger
2025-08-22  6:40 ` [PATCH v5 09/21] intel_iommu: Fail passthrough device under PCI bridge if x-flts=on Zhenzhong Duan
2025-08-28 10:33   ` Yi Liu
2025-09-01  5:14     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 10/21] intel_iommu: Introduce two helpers vtd_as_from/to_iommu_pasid_locked Zhenzhong Duan
2025-08-28 11:36   ` Yi Liu
2025-09-01  5:33     ` Duan, Zhenzhong
2025-09-03  6:30       ` Yi Liu
2025-09-03  7:13         ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 11/21] intel_iommu: Handle PASID entry removal and update Zhenzhong Duan
2025-08-27 14:25   ` Eric Auger
2025-09-01  3:17     ` Duan, Zhenzhong
2025-08-28 12:05   ` Yi Liu
2025-09-01  3:31     ` Duan, Zhenzhong
2025-09-03  7:58       ` Yi Liu
2025-09-04  2:37         ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 12/21] intel_iommu: Handle PASID entry addition Zhenzhong Duan
2025-08-27 16:22   ` Eric Auger
2025-09-01  9:03     ` Duan, Zhenzhong
2025-09-03  8:52       ` Yi Liu
2025-09-04  2:45         ` Duan, Zhenzhong
2025-08-29  5:46   ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 13/21] intel_iommu: Introduce a new pasid cache invalidation type FORCE_RESET Zhenzhong Duan
2025-08-27 16:28   ` Eric Auger [this message]
2025-08-29  5:56     ` Yi Liu
2025-09-01  9:04     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 14/21] intel_iommu: Stick to system MR for IOMMUFD backed host device when x-fls=on Zhenzhong Duan
2025-08-27 17:14   ` Eric Auger
2025-08-29  6:06   ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 15/21] intel_iommu: Bind/unbind guest page table to host Zhenzhong Duan
2025-08-28  8:37   ` Eric Auger
2025-08-29  7:05   ` Yi Liu
2025-08-22  6:40 ` [PATCH v5 16/21] intel_iommu: Replay pasid bindings after context cache invalidation Zhenzhong Duan
2025-08-28  9:43   ` Eric Auger
2025-08-29  7:35     ` Yi Liu
2025-09-01  8:11       ` Duan, Zhenzhong
2025-09-03 10:18         ` Yi Liu
2025-09-04  6:42           ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 17/21] intel_iommu: Propagate PASID-based iotlb invalidation to host Zhenzhong Duan
2025-08-28 10:00   ` Eric Auger
2025-08-28 12:11     ` Yi Liu
2025-09-01  8:32     ` Duan, Zhenzhong
2025-08-22  6:40 ` [PATCH v5 18/21] intel_iommu: Replay all pasid bindings when either SRTP or TE bit is changed Zhenzhong Duan
2025-08-28 10:02   ` Eric Auger
2025-08-22  6:40 ` [PATCH v5 19/21] vfio: Add a new element bypass_ro in VFIOContainerBase Zhenzhong Duan
2025-08-28 12:47   ` Eric Auger
2025-08-22  6:40 ` [PATCH v5 20/21] Workaround for ERRATA_772415_SPR17 Zhenzhong Duan
2025-08-22 23:55   ` Nicolin Chen
2025-08-25  9:21     ` Duan, Zhenzhong
2025-08-25 16:58       ` Nicolin Chen
2025-08-27  7:11         ` Duan, Zhenzhong
2025-08-27  8:42           ` Nicolin Chen
2025-08-27 11:56     ` Yi Liu
2025-08-27 15:09       ` Nicolin Chen
2025-08-29  8:16         ` Yi Liu
2025-08-29  8:54           ` Nicolin Chen
2025-08-22  6:40 ` [PATCH v5 21/21] intel_iommu: Enable host device when x-flts=on in scalable mode Zhenzhong Duan
2025-08-28 12:51   ` Eric Auger
2025-08-29  7:42   ` Yi Liu
2025-08-27 11:13 ` [PATCH v5 00/21] intel_iommu: Enable stage-1 translation for passthrough device Yi Liu
2025-08-28  5:53   ` Duan, Zhenzhong

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