From: Richard Henderson <richard.henderson@linaro.org>
To: Daniel Henrique Barboza <dbarboza@ventanamicro.com>,
qemu-devel@nongnu.org
Cc: qemu-riscv@nongnu.org, alistair.francis@wdc.com,
bmeng@tinylab.org, liwei1518@gmail.com,
zhiwei_liu@linux.alibaba.com, palmer@rivosinc.com
Subject: Re: [PATCH for-9.1 v3 2/2] trans_privileged.c.inc: set (m|s)tval on ebreak breakpoint
Date: Tue, 16 Apr 2024 19:40:53 -0700 [thread overview]
Message-ID: <c580f2b9-0c95-4135-8f6a-290a23b8219e@linaro.org> (raw)
In-Reply-To: <20240416230437.1869024-3-dbarboza@ventanamicro.com>
On 4/16/24 16:04, Daniel Henrique Barboza wrote:
> Privileged spec section 4.1.9 mentions:
>
> "When a trap is taken into S-mode, stval is written with
> exception-specific information to assist software in handling the trap.
> (...)
>
> If stval is written with a nonzero value when a breakpoint,
> address-misaligned, access-fault, or page-fault exception occurs on an
> instruction fetch, load, or store, then stval will contain the faulting
> virtual address."
>
> A similar text is found for mtval in section 3.1.16.
>
> Setting mtval/stval in this scenario is optional, but some softwares read
> these regs when handling ebreaks.
>
> Write 'badaddr' in all ebreak breakpoints to write the appropriate
> 'tval' during riscv_do_cpu_interrrupt().
>
> Signed-off-by: Daniel Henrique Barboza<dbarboza@ventanamicro.com>
> ---
> target/riscv/insn_trans/trans_privileged.c.inc | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
r~
next prev parent reply other threads:[~2024-04-17 2:41 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-04-16 23:04 [PATCH for-9.1 v3 0/2] target/riscv: set tval in breakpoints Daniel Henrique Barboza
2024-04-16 23:04 ` [PATCH for-9.1 v3 1/2] target/riscv/debug: set tval=pc in breakpoint exceptions Daniel Henrique Barboza
2024-04-26 1:39 ` LIU Zhiwei
2024-04-29 3:08 ` Alistair Francis
2024-04-16 23:04 ` [PATCH for-9.1 v3 2/2] trans_privileged.c.inc: set (m|s)tval on ebreak breakpoint Daniel Henrique Barboza
2024-04-17 2:40 ` Richard Henderson [this message]
2024-04-26 1:40 ` LIU Zhiwei
2024-04-29 3:09 ` Alistair Francis
2024-04-29 3:16 ` [PATCH for-9.1 v3 0/2] target/riscv: set tval in breakpoints Alistair Francis
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