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[174.21.76.141]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-1fbb6a122a1sm18490235ad.45.2024.07.09.09.17.28 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Tue, 09 Jul 2024 09:17:28 -0700 (PDT) Message-ID: Date: Tue, 9 Jul 2024 09:17:26 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 0/2] target/arm: Fix unwind from dc zva and FEAT_MOPS To: Peter Maydell Cc: qemu-devel@nongnu.org, qemu-arm@nongnu.org, qemu-ppc@nongnu.org, iii@linux.ibm.com, david@redhat.com, balaton@eik.bme.hu, "qemu-riscv@nongnu.org" References: <20240702234155.2106399-1-richard.henderson@linaro.org> Content-Language: en-US From: Richard Henderson In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::631; envelope-from=richard.henderson@linaro.org; helo=mail-pl1-x631.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 7/8/24 07:25, Peter Maydell wrote: > On Wed, 3 Jul 2024 at 00:43, Richard Henderson > wrote: >> >> While looking into Zoltan's attempt to speed up ppc64 DCBZ >> (data cache block set to zero), I wondered what AArch64 was >> doing differently. It turned out that Arm is the only user >> of tlb_vaddr_to_host. > > riscv also seems to use it in vext_ldff(), fwiw. So it does, followed by a second probe for read. That's quite wrong... But you're right that it has a similar race condition. r~