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[173.197.98.125]) by smtp.gmail.com with ESMTPSA id pt5-20020a17090b3d0500b002994f848bc9sm2342212pjb.43.2024.02.21.13.22.08 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Wed, 21 Feb 2024 13:22:09 -0800 (PST) Message-ID: Date: Wed, 21 Feb 2024 11:22:06 -1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [RFC PATCH v2 01/22] target/arm: Add FEAT_NMI to max Content-Language: en-US To: Jinjie Ruan , peter.maydell@linaro.org, eduardo@habkost.net, marcel.apfelbaum@gmail.com, philmd@linaro.org, wangyanan55@huawei.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org References: <20240221130823.677762-1-ruanjinjie@huawei.com> <20240221130823.677762-2-ruanjinjie@huawei.com> From: Richard Henderson In-Reply-To: <20240221130823.677762-2-ruanjinjie@huawei.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::1034; envelope-from=richard.henderson@linaro.org; helo=mail-pj1-x1034.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On 2/21/24 03:08, Jinjie Ruan via wrote: > Enable FEAT_NMI on the 'max' CPU. > > Signed-off-by: Jinjie Ruan > --- > docs/system/arm/emulation.rst | 1 + > target/arm/tcg/cpu64.c | 1 + > 2 files changed, 2 insertions(+) Reviewed-by: Richard Henderson However, this patch must be sorted last, after all support for FEAT_NMI is present. r~ > > diff --git a/docs/system/arm/emulation.rst b/docs/system/arm/emulation.rst > index f67aea2d83..91baf7ad69 100644 > --- a/docs/system/arm/emulation.rst > +++ b/docs/system/arm/emulation.rst > @@ -63,6 +63,7 @@ the following architecture extensions: > - FEAT_MTE (Memory Tagging Extension) > - FEAT_MTE2 (Memory Tagging Extension) > - FEAT_MTE3 (MTE Asymmetric Fault Handling) > +- FEAT_NMI (Non-maskable Interrupt) > - FEAT_NV (Nested Virtualization) > - FEAT_NV2 (Enhanced nested virtualization support) > - FEAT_PACIMP (Pointer authentication - IMPLEMENTATION DEFINED algorithm) > diff --git a/target/arm/tcg/cpu64.c b/target/arm/tcg/cpu64.c > index 5fba2c0f04..60f0dcd799 100644 > --- a/target/arm/tcg/cpu64.c > +++ b/target/arm/tcg/cpu64.c > @@ -1175,6 +1175,7 @@ void aarch64_max_tcg_initfn(Object *obj) > t = FIELD_DP64(t, ID_AA64PFR1, RAS_FRAC, 0); /* FEAT_RASv1p1 + FEAT_DoubleFault */ > t = FIELD_DP64(t, ID_AA64PFR1, SME, 1); /* FEAT_SME */ > t = FIELD_DP64(t, ID_AA64PFR1, CSV2_FRAC, 0); /* FEAT_CSV2_2 */ > + t = FIELD_DP64(t, ID_AA64PFR1, NMI, 1); /* FEAT_NMI */ > cpu->isar.id_aa64pfr1 = t; > > t = cpu->isar.id_aa64mmfr0;