qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Ganesh <ganeshgr@linux.ibm.com>
To: David Gibson <david@gibson.dropbear.id.au>
Cc: Aravinda Prasad <arawinda.p@gmail.com>,
	aik@ozlabs.ru, qemu-devel@nongnu.org, groug@kaod.org,
	paulus@ozlabs.org, qemu-ppc@nongnu.org
Subject: Re: [PATCH v20 5/7] ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" RTAS calls
Date: Mon, 20 Jan 2020 22:48:20 +0530	[thread overview]
Message-ID: <c64f80ec-b959-4e7c-9339-40e4c1b7e629@linux.ibm.com> (raw)
In-Reply-To: <20200120004633.GI54439@umbus>



On 1/20/20 6:16 AM, David Gibson wrote:
> On Fri, Jan 17, 2020 at 03:08:53PM +0530, Ganesh Goudar wrote:
>> From: Aravinda Prasad <arawinda.p@gmail.com>
>>
>> This patch adds support in QEMU to handle "ibm,nmi-register"
>> and "ibm,nmi-interlock" RTAS calls.
>>
>> The machine check notification address is saved when the
>> OS issues "ibm,nmi-register" RTAS call.
>>
>> This patch also handles the case when multiple processors
>> experience machine check at or about the same time by
>> handling "ibm,nmi-interlock" call. In such cases, as per
>> PAPR, subsequent processors serialize waiting for the first
>> processor to issue the "ibm,nmi-interlock" call. The second
>> processor that also received a machine check error waits
>> till the first processor is done reading the error log.
>> The first processor issues "ibm,nmi-interlock" call
>> when the error log is consumed.
>>
>> Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
>> [Register fwnmi RTAS calls in core_rtas_register_types()
>>   where other RTAS calls are registered]
>> Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
>> ---
>>   hw/ppc/spapr_caps.c    |  7 +++++
>>   hw/ppc/spapr_rtas.c    | 59 ++++++++++++++++++++++++++++++++++++++++++
>>   include/hw/ppc/spapr.h |  4 ++-
>>   3 files changed, 69 insertions(+), 1 deletion(-)
>>
>> diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c
>> index 3001098601..c43498da49 100644
>> --- a/hw/ppc/spapr_caps.c
>> +++ b/hw/ppc/spapr_caps.c
>> @@ -502,6 +502,13 @@ static void cap_fwnmi_mce_apply(SpaprMachineState *spapr, uint8_t val,
>>       if (!val) {
>>           return; /* Disabled by default */
>>       }
>> +
>> +    if (kvm_enabled()) {
>> +        if (kvmppc_set_fwnmi() < 0) {
>> +            error_report("Could not enable fwnmi capability");
>> +            exit(1);
> We have uniform failure handling for the cap_apply functions so you
> shouldn't roll your own.  Simply error_setg() on the supplied errp,
> and the generic caps code will handle exiting out.
>
> Also, I think you should explicitly mention KVM in this message, to
> make it clear that's where the problem is occurring.  From the user's
> point of view they've just *set* the spapr fwnmi capability so this
> won't help them figure out why it isn't working.
sure
>
> Also, weren't you going to report a (non fatal) warning in the TCG
> case, since TCG FWNMI behaviour doesn't precisely match true FWNMI
> behaviour (though in a way that probably won't matter in practice).
ok
>
>> +        }
>> +    }
>>   }
>>   
>>   SpaprCapabilityInfo capability_table[SPAPR_CAP_NUM] = {
>> diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c
>> index 2c066a372d..3f162d82f5 100644
>> --- a/hw/ppc/spapr_rtas.c
>> +++ b/hw/ppc/spapr_rtas.c
>> @@ -400,6 +400,61 @@ static void rtas_get_power_level(PowerPCCPU *cpu, SpaprMachineState *spapr,
>>       rtas_st(rets, 1, 100);
>>   }
>>   
>> +static void rtas_ibm_nmi_register(PowerPCCPU *cpu,
>> +                                  SpaprMachineState *spapr,
>> +                                  uint32_t token, uint32_t nargs,
>> +                                  target_ulong args,
>> +                                  uint32_t nret, target_ulong rets)
>> +{
>> +    hwaddr rtas_addr;
>> +
>> +    if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) {
>> +        rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
>> +        return;
>> +    }
>> +
>> +    rtas_addr = spapr_get_rtas_addr();
>> +    if (!rtas_addr) {
>> +        rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
>> +        return;
>> +    }
>> +
>> +    spapr->guest_machine_check_addr = rtas_ld(args, 1);
>> +    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
>> +}
>> +
>> +static void rtas_ibm_nmi_interlock(PowerPCCPU *cpu,
>> +                                   SpaprMachineState *spapr,
>> +                                   uint32_t token, uint32_t nargs,
>> +                                   target_ulong args,
>> +                                   uint32_t nret, target_ulong rets)
>> +{
>> +    if (spapr_get_cap(spapr, SPAPR_CAP_FWNMI_MCE) == SPAPR_CAP_OFF) {
>> +        rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
>> +        return;
>> +    }
>> +
>> +    if (spapr->guest_machine_check_addr == -1) {
>> +        /* NMI register not called */
>> +        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
>> +        return;
>> +    }
>> +
>> +    if (spapr->mc_status != cpu->vcpu_id) {
>> +        /* The vCPU that hit the NMI should invoke "ibm,nmi-interlock" */
>> +        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
>> +        return;
>> +    }
>> +
>> +    /*
>> +     * vCPU issuing "ibm,nmi-interlock" is done with NMI handling,
>> +     * hence unset mc_status.
>> +     */
>> +    spapr->mc_status = -1;
>> +    qemu_cond_signal(&spapr->mc_delivery_cond);
>> +    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
>> +}
>> +
>>   static struct rtas_call {
>>       const char *name;
>>       spapr_rtas_fn fn;
>> @@ -528,6 +583,10 @@ static void core_rtas_register_types(void)
>>                           rtas_set_power_level);
>>       spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
>>                           rtas_get_power_level);
>> +    spapr_rtas_register(RTAS_IBM_NMI_REGISTER, "ibm,nmi-register",
>> +                        rtas_ibm_nmi_register);
>> +    spapr_rtas_register(RTAS_IBM_NMI_INTERLOCK, "ibm,nmi-interlock",
>> +                        rtas_ibm_nmi_interlock);
>>   }
>>   
>>   type_init(core_rtas_register_types)
>> diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h
>> index 652a5514e8..f6f82d88aa 100644
>> --- a/include/hw/ppc/spapr.h
>> +++ b/include/hw/ppc/spapr.h
>> @@ -656,8 +656,10 @@ target_ulong spapr_hypercall(PowerPCCPU *cpu, target_ulong opcode,
>>   #define RTAS_IBM_REMOVE_PE_DMA_WINDOW           (RTAS_TOKEN_BASE + 0x28)
>>   #define RTAS_IBM_RESET_PE_DMA_WINDOW            (RTAS_TOKEN_BASE + 0x29)
>>   #define RTAS_IBM_SUSPEND_ME                     (RTAS_TOKEN_BASE + 0x2A)
>> +#define RTAS_IBM_NMI_REGISTER                   (RTAS_TOKEN_BASE + 0x2B)
>> +#define RTAS_IBM_NMI_INTERLOCK                  (RTAS_TOKEN_BASE + 0x2C)
>>   
>> -#define RTAS_TOKEN_MAX                          (RTAS_TOKEN_BASE + 0x2B)
>> +#define RTAS_TOKEN_MAX                          (RTAS_TOKEN_BASE + 0x2D)
>>   
>>   /* RTAS ibm,get-system-parameter token values */
>>   #define RTAS_SYSPARM_SPLPAR_CHARACTERISTICS      20



  reply	other threads:[~2020-01-20 17:24 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-01-17  9:38 [PATCH v20 0/7]target-ppc/spapr: Add FWNMI support in QEMU for PowerKVM guests Ganesh Goudar
2020-01-17  9:38 ` [PATCH v20 1/7] Wrapper function to wait on condition for the main loop mutex Ganesh Goudar
2020-01-17  9:38 ` [PATCH v20 2/7] ppc: spapr: Introduce FWNMI capability Ganesh Goudar
2020-01-20  0:40   ` David Gibson
2020-01-17  9:38 ` [PATCH v20 3/7] target/ppc: Handle NMI guest exit Ganesh Goudar
2020-01-17  9:38 ` [PATCH v20 4/7] target/ppc: Build rtas error log upon an MCE Ganesh Goudar
2020-01-17  9:38 ` [PATCH v20 5/7] ppc: spapr: Handle "ibm, nmi-register" and "ibm, nmi-interlock" RTAS calls Ganesh Goudar
2020-01-20  0:46   ` [PATCH v20 5/7] ppc: spapr: Handle "ibm,nmi-register" and "ibm,nmi-interlock" " David Gibson
2020-01-20 17:18     ` Ganesh [this message]
2020-01-17  9:38 ` [PATCH v20 6/7] migration: Include migration support for machine check handling Ganesh Goudar
2020-01-20  0:48   ` David Gibson
2020-01-20 17:31     ` Ganesh
2020-01-17  9:38 ` [PATCH v20 7/7] ppc: spapr: Activate the FWNMI functionality Ganesh Goudar
2020-01-22 11:33   ` Greg Kurz

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=c64f80ec-b959-4e7c-9339-40e4c1b7e629@linux.ibm.com \
    --to=ganeshgr@linux.ibm.com \
    --cc=aik@ozlabs.ru \
    --cc=arawinda.p@gmail.com \
    --cc=david@gibson.dropbear.id.au \
    --cc=groug@kaod.org \
    --cc=paulus@ozlabs.org \
    --cc=qemu-devel@nongnu.org \
    --cc=qemu-ppc@nongnu.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).