Re: [PATCH 1/3] docs/specs/tpm: document PPI support on ARM64 virt

[Stefan Berger <stefanb@linux.ibm.com>]

On 3/24/26 3:10 AM, Mohammadfaiz Bawa wrote:
> Document that tpm-tis-device on the ARM virt machine supports PPI
> with dynamically allocated MMIO via the platform bus, unlike x86
> where PPI is at the fixed address 0xFED45000.
> 
> Also add hw/arm/virt-acpi-build.c and hw/acpi/tpm.c to the list
> of files related to TPM ACPI tables.
> 
> Signed-off-by: Mohammadfaiz Bawa <mbawa@redhat.com>
> ---
>   docs/specs/tpm.rst | 22 ++++++++++++++++++++++
>   1 file changed, 22 insertions(+)
> 
> diff --git a/docs/specs/tpm.rst b/docs/specs/tpm.rst
> index b630a351b4f77a8d2512f22446d00a4d674c7777..63cc0b68cd79d64138d4dd05ae158430c6a74643 100644
> --- a/docs/specs/tpm.rst
> +++ b/docs/specs/tpm.rst
> @@ -187,8 +187,30 @@ The location of the table is given by the fw_cfg ``tpmppi_address``
>   field.  The PPI memory region size is 0x400 (``TPM_PPI_ADDR_SIZE``) to
>   leave enough room for future updates.
> 
> +PPI on ARM64 virt
> +-----------------
> +
> +The ARM virt machine supports PPI for ``tpm-tis-device`` as defined
> +in the `PPI specification`_.
> +
> +Unlike the x86 TIS device where the PPI memory region is mapped at
> +the fixed address ``0xFED45000`` (within the TIS MMIO range), the
> +ARM64 sysbus device registers PPI memory as a second MMIO region
> +on the platform bus. The platform bus assigns the guest physical
> +address dynamically at device plug time. The ACPI ``_DSM`` method
> +and PPI operation regions reference this dynamically resolved
> +address.
> +
> +PPI is enabled by default and can be controlled with the ``ppi``
> +property (e.g. ``-device tpm-tis-device,tpmdev=tpm0,ppi=on``).
> +Without PPI support, guest operating systems such as Windows 11
> +ARM64 will log errors when attempting to query TPM Physical
> +Presence capabilities via the ACPI ``_DSM`` method.

I remember having played around with TPM for QEMU on ARM64 (Raspberry 
5(?)) a while ago and had the impression that there was something 
related to caching that prevented the MMIO interface from working 
correctly and Peter may have confirmed this back then on IRC .. I am not 
sure what exactly it was that didn't work correctly when run natively on 
ARM hardware. It worked well when run in CPU emulation on x86_64 for 
example. So I am wondering whether there is a minimum requirement for an 
ARM CPU or ARM CPU features related to caching that someone needs to 
know about to be able to use TPM TIS successfully? If so, it would 
probably be good to mention it here as well. If you know.

Otherwise this looks good to me.

> +
>   QEMU files related to TPM ACPI tables:
>    - ``hw/i386/acpi-build.c``
> + - ``hw/arm/virt-acpi-build.c``
> + - ``hw/acpi/tpm.c``
>    - ``include/hw/acpi/tpm.h``
> 
>   TPM backend devices
> 

Reviewed-by: Stefan Berger <stefanb@linux.ibm.com>