Re: [PATCH v2 04/19] host-utils: add 128-bit quotient support to divu128/divs128

[Richard Henderson <richard.henderson@linaro.org>]

On 8/31/21 9:39 AM, Luis Pires wrote:
> These will be used to implement new decimal floating point
> instructions from Power ISA 3.1.
> 
> A new argument, prem, was added to divu128/divs128 to receive the
> remainder, freeing up phigh to receive the high 64 bits of the
> quotient.
> 
> For scenarios supported by the previous implementation
> (<= 64-bit quotient) with large (> 64-bit) dividends, testing showed
> that:
> - when dividend >> divisor, the performance of the new implementation
> is equivalent to the old one.
> - as the dividend and the divisor get closer (e.g. 65-bit dividend and
> 64-bit divisor), the performance is significantly improved, due to the
> smaller number of shift-subtract iterations.

Hmm.  I'll note that we have a better divmod primitive in tree, but we aren't using it 
here: udiv_qrnnd in include/fpu/softfloat-macros.h.

Given that none of the existing uses require the high part, should we be creating a new 
interface?  The bug you highlight wrt truncation could be fixed separately.

> -void divs128(int64_t *plow, int64_t *phigh, int64_t divisor)
> +void divs128(uint64_t *plow, int64_t *phigh, int64_t *prem, int64_t divisor)
>   {
> -    int sgn_dvdnd = *phigh < 0;
> -    int sgn_divsr = divisor < 0;
> +    int neg_quotient = 0, neg_remainder = 0;

You might as well use bool.


r~